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    21.
    发明专利
    未知

    公开(公告)号：DE69322832T2

    公开(公告)日：1999-08-05

    申请号：DE69322832

    申请日：1993-10-04

    Applicant: IBM

    Inventor： BEAMAN BRIAN SAMUEL ,  DOANY FUAD ELIAS ,  FOGEL KEITH EDWARD ,  HEDRICK JR JAMES LUPTON ,  LAURO PAUL ALFRED ,  NORCOTT MAURICE HEATHCOTE ,  RITSKO JOHN JAMES ,  SHI LEATHEN ,  SHIH DA-YUAN ,  WALKER GEORGE FREDERICK

    IPC: G01R1/067 ,  G01R1/073 ,  H01L23/52 ,  G01R3/00 ,  G01R31/28 ,  H01L23/498 ,  H01L23/538 ,  H01L25/065 ,  H01L25/07 ,  H01L25/18

    Abstract: The present invention is directed to a structure (2) for packaging electronic devices, such as semiconductor chips (36, 38), in a three dimensional structure which permits electrical signals to propagate both horizontally and vertically. The structure is formed from a plurality of assemblies (4, 6). Each assembly is formed from a substrate (8) having disposed on at least one surface a plurality of electronic devices. Each assembly is disposed in a stack of adjacent assemblies. Between adjacent assemblies there is an electrical interconnection means (49) electrically interconnecting each assembly. The electrical interconnection means is formed from an elastomeric interposer. The elastomeric interposer is formed from an elastomeric material having a plurality of electrical conductors extending therethrough, either in a clustered or un-clustered arrangement. The electrical interconnection means is fabricated having a plurality of apertures extending therethrough. The array of apertures corresponds to the array of electronic devices on the substrates. The aperture and electrical interconnection means is disposed over the array of electronic devices so that the electrical interconnection means is between adjacent electronic devices. The stack of assemblies is compressed thereby compressing the electrical interconnection means between adjacent assemblies. The substrate of each assembly is formed from a thermally conductive material such as diamond. A heat dissipation means is thermally connected to the edges of the substrate to extract heat generated within the structure. Methods for fabricating the electrical interconnection means as a stand alone elastomeric sheet are described. The ends (50, 54) of the plurality of conductors in the electrical interconnection means (49) are fabricated so that upon compression between adjacent assemblies (4, 6) there is a wiping action between the conductor ends (e.g. 50) and contact locations (e.g. 30) on the adjacent assemblies to form a good electrical contact therewith.

    23.
    发明专利
    未知

    公开(公告)号：DE69322832D1

    公开(公告)日：1999-02-11

    申请号：DE69322832

    申请日：1993-10-04

    Applicant: IBM

    Inventor： BEAMAN BRIAN SAMUEL ,  DOANY FUAD ELIAS ,  FOGEL KEITH EDWARD ,  HEDRICK JR JAMES LUPTON ,  LAURO PAUL ALFRED ,  NORCOTT MAURICE HEATHCOTE ,  RITSKO JOHN JAMES ,  SHI LEATHEN ,  SHIH DA-YUAN ,  WALKER GEORGE FREDERICK

    IPC: G01R1/067 ,  G01R1/073 ,  H01L23/52 ,  G01R3/00 ,  G01R31/28 ,  H01L23/498 ,  H01L23/538 ,  H01L25/065 ,  H01L25/07 ,  H01L25/18

    Abstract: The present invention is directed to a structure (2) for packaging electronic devices, such as semiconductor chips (36, 38), in a three dimensional structure which permits electrical signals to propagate both horizontally and vertically. The structure is formed from a plurality of assemblies (4, 6). Each assembly is formed from a substrate (8) having disposed on at least one surface a plurality of electronic devices. Each assembly is disposed in a stack of adjacent assemblies. Between adjacent assemblies there is an electrical interconnection means (49) electrically interconnecting each assembly. The electrical interconnection means is formed from an elastomeric interposer. The elastomeric interposer is formed from an elastomeric material having a plurality of electrical conductors extending therethrough, either in a clustered or un-clustered arrangement. The electrical interconnection means is fabricated having a plurality of apertures extending therethrough. The array of apertures corresponds to the array of electronic devices on the substrates. The aperture and electrical interconnection means is disposed over the array of electronic devices so that the electrical interconnection means is between adjacent electronic devices. The stack of assemblies is compressed thereby compressing the electrical interconnection means between adjacent assemblies. The substrate of each assembly is formed from a thermally conductive material such as diamond. A heat dissipation means is thermally connected to the edges of the substrate to extract heat generated within the structure. Methods for fabricating the electrical interconnection means as a stand alone elastomeric sheet are described. The ends (50, 54) of the plurality of conductors in the electrical interconnection means (49) are fabricated so that upon compression between adjacent assemblies (4, 6) there is a wiping action between the conductor ends (e.g. 50) and contact locations (e.g. 30) on the adjacent assemblies to form a good electrical contact therewith.

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