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    23.
    发明专利
    未知

    公开(公告)号：DE102004046957A1

    公开(公告)日：2006-04-06

    申请号：DE102004046957

    申请日：2004-09-28

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： JAKOBS ANDREAS ,  PLAETTNER ECKEHARD

    IPC: G11C7/22 ,  G11C11/4076

    Abstract: The invention describes a method for adjusting signal propagation times in a memory system in which a controller is connected to at least one memory chip via a plurality of connecting lines for the purpose of transmitting control and data signals and at least one time reference signal. In line with the invention, the propagation time differences between connecting lines are ascertained from the result of echo measurements. To this end a respective transmitted pulse is applied to one end, selected as the transmission end, of the connecting lines in question, while the other end of the connecting lines in question is respectively terminated with a reflective termination. At the transmission end, the echo time which elapses between one edge of the transmitted pulse and the appearance of this edge's echo reflected from the other end is measured. On the basis of the ascertained propagation time differences, regulatable delay devices are set in order to compensate for these propagation time differences. The subject matter of the invention is also circuit arrangements for performing this method.

    24.
    发明专利
    未知

    公开(公告)号：DE102004041331A1

    公开(公告)日：2006-03-09

    申请号：DE102004041331

    申请日：2004-08-26

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： JAKOBS ANDREAS ,  GREGORIUS PETER

    IPC: G11C11/4072 ,  H03M7/00

    Abstract: A code driver is described having a codeword source, which has n>1 source terminals and is designed to output at these terminals a sequence of n-digit codewords, each in the form of n parallel code characters, and having n parallel transmission paths between the n source terminals and n transmit terminals for sending the message represented by the codewords to a receiver. According to the invention, a selection device is provided, which indicates explicitly for each codeword which of the n digits of the codeword concerned are relevant to the decoding of the message in the receiver, and which, dependent on this explicit indication, activates only those of the n transmission paths that are assigned to the relevant digits of the codeword.

    25.
    发明专利
    未知

    公开(公告)号：DE10332616B3

    公开(公告)日：2005-03-17

    申请号：DE10332616

    申请日：2003-07-17

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： JAKOBS ANDREAS ,  RUCKERBAUER HERMANN ,  KUZMENKA MAKSIM

    IPC: G11C5/06 ,  G11C7/22

    Abstract: The invention relates to a semiconductor memory module having a plurality of memory chips arranged next to one another in a row. The memory module has a module-internal clock, command/address and data bus which transfers clock signal, command and address signals and also data signals from a memory controller device to the memory chips and data signals from the memory chips to the memory controller device. The memory module has respective clock, command/address and data signal lines. The clock signal lines comprise two differential clock signal lines which, at their end opposite to the memory controller device are either open or connected to one another by a short-circuiting bridge. The memory chips, during a write operation, synchronize the write data with the clock signal running from the memory controller device to the end of the clock signal line and, during a read operation, output the read data synchronously with the clock signal reflected from the open or short-circuited end of the clock signal lines.

    26.
    发明专利
    未知

    公开(公告)号：DE19903200B4

    公开(公告)日：2004-02-19

    申请号：DE19903200

    申请日：1999-01-27

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： JAKOBS ANDREAS

    IPC: G03F1/00 ,  H01L21/66 ,  H01L21/768 ,  H01L21/18 ,  G06F17/50

    Abstract: The invention relates to a method for producing structures on the surface of a semiconductor wafer, in which after the generation of a primary layout corresponding to the structures to be produced in accordance with predetermined desired physical parameters of the structures, calculation of the parasitic fault parameters that would result from the semiconductor structures after production using the primary layout, correction of the layout to suit the results of the step of calculating the parasitic fault parameters, and production of a mask based on the layout that has been corrected to suit the parasitic fault parameters, the surface of a semiconductor wafer is structured using an etching process. The structuring process leads to production- or technology-dictated deviations from the shapes that are produced on the mask based on the corrected layout, and the primary layout is corrected on the basis of the production- or technology-dictated deviations of the structures.

    29.
    发明专利
    未知

    公开(公告)号：DE102004041331B4

    公开(公告)日：2007-05-10

    申请号：DE102004041331

    申请日：2004-08-26

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： JAKOBS ANDREAS ,  GREGORIUS PETER

    IPC: G11C7/00 ,  H03M7/00

    Abstract: A code driver is described having a codeword source, which has n>1 source terminals and is designed to output at these terminals a sequence of n-digit codewords, each in the form of n parallel code characters, and having n parallel transmission paths between the n source terminals and n transmit terminals for sending the message represented by the codewords to a receiver. According to the invention, a selection device is provided, which indicates explicitly for each codeword which of the n digits of the codeword concerned are relevant to the decoding of the message in the receiver, and which, dependent on this explicit indication, activates only those of the n transmission paths that are assigned to the relevant digits of the codeword.

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