公开(公告)号：DE69710248D1

公开(公告)日：2002-03-21

申请号：DE69710248

申请日：1997-04-22

Applicant: LUCENT TECHNOLOGIES INC

Inventor： DEGANI YINON ,  GREENBERG LAWRENCE ARNOLD

IPC: H01L21/56 ,  H01L21/60

Abstract: A technique for enabling sufficient flow of flux cleaning fluids (230) and an underfill material (300) in the relatively low-profile gap (140) between a flip-chip bonded IC chip (1) and a substrate (10), such as a printed circuit board, is to provide at least one aperture (30) in the substrate under the IC chip. The use of such an aperture enables, for example, flux cleaning fluid to flow (240) through the aperture into the low-profile gap between the IC chip and the substrate surface, such as by the application of pressure or by gravity, which then exits through openings between formed interconnect bonds (110) at a sufficient flow rate to adequately remove flux residues. An epoxy underfill (300) to the IC chip can be formed in a similar manner. For example, a relatively thick bead of epoxy (400), such as on the order of the thickness of the IC chip (1), is deposited or stencil printed on the substrate surface (15) around the edges of the IC chip and capillary action is then relied upon to draw the epoxy into the low-profile gap (140). Undesirable air pockets which otherwise would develop form the displaced air as the epoxy flows into the low-profile gap can advantageously escape through the aperture (30) of the invention.

公开(公告)号：SG124229A1

公开(公告)日：2006-08-30

申请号：SG200006278

申请日：2000-11-01

Applicant: LUCENT TECHNOLOGIES INC

Inventor： DEGANI YINON

IPC: G01R31/26 ,  H01L21/00 ,  H01L21/60 ,  H01L21/607 ,  H01L21/66 ,  H01L23/485

Abstract: The specification describes a technique for burn-in electrical testing of IC dies prior to wire bonding the dies to the next interconnection level. The dies are provided with a test solder bump array interconnected to the IC contact pads of the dies. The Known Good Dies (KGD) can then be wire bonded, or alternatively flip-chip solder bump bonded, to the next interconnect level.

公开(公告)号：DE69918631D1

公开(公告)日：2004-08-19

申请号：DE69918631

申请日：1999-10-05

Applicant: LUCENT TECHNOLOGIES INC

Inventor： DEGANI YINON ,  GREGUS JEFFREY ALAN

IPC: H05K3/34 ,  H01L21/60 ,  H01L23/485

Abstract: The specification describes techniques for applying under bump metallization (UBM) for solder bump interconnections (58) on IC chips (41) with Al bonding sites (54,55). The UBM of the invention comprises a copper layer (56) applied directly to the aluminum bonding sites (54,55). Reliable bonds are obtained if the Al surface is a nascent surface. Such a surface can be provided by back sputtering an aluminum bonding site (54), or by a freshly sputtered aluminum layer (55). The copper layer (56) is deposited on the nascent aluminum surface in e.g. a cluster tool without breaking vacuum. The UBM can be patterned using subtractive techniques.

公开(公告)号：CA2342409A1

公开(公告)日：2001-11-22

申请号：CA2342409

申请日：2001-03-29

Applicant: LUCENT TECHNOLOGIES INC

Inventor： TAI KING LIEN ,  DUDDERAR THOMAS DIXON ,  DEGANI YINON

IPC: B81C3/00 ,  B81B7/00 ,  H01L23/02 ,  H01L23/06 ,  H01L31/02 ,  B81C5/00

Abstract: The specification describes packaging assemblies for micro-electronic machin ed mechanical systems (MEMS). The MEMS devices in these package assemblies are based on silicon MEMS devices on a silicon support and the MEMS devices and the silicon support are mechanically isolated from foreign materials. Foreign materials pose the potential for differential thermal expansion that deleteriously affects optical alignment in the MEMS devices. In a preferred embodiment the MEMS devices are enclosed in an all- silicon chamber. Mechanical isolation is also aided by using a pin contact array for interconnecting the silicon support substrate for the MEMS devices to the ne xt interconnect level. The use of the pin contact array also allows the MEMS devices to be easily demountable for replacement or repair.

公开(公告)号：DE60112003T2

公开(公告)日：2006-06-01

申请号：DE60112003

申请日：2001-05-31

Applicant: LUCENT TECHNOLOGIES INC ,  AGERE SYST OPTOELECTRONICS

Inventor： DEGANI YINON ,  DUDDERAR THOMAS DIXON ,  TAI KING LIEN

IPC: B81B7/00 ,  G02B26/08 ,  B81B7/02 ,  H01L23/538

Abstract: The specification describes interconnection strategies for micro-electronic machined mechanical systems (MEMS). Typical MEMS device array comprise a large number of individual mechanical devices each electrically driven by multi-chip modules (MCMs). High density interconnection is achieved by mounting the MCMs mounted on both sides of a system interconnection substrate. Overall interconnection length is reduced by locating the MCMs in a common circuit driving a given mechanical element on opposite sides of the system interconnection substrate and interconnecting them using vias through the substrate. Rapid replacement/repair is facilitated by mounted all active elements in sockets using contact pin arrays for electrical connections. In service reliability is obtained by providing spare sockets for redundant MCMs.

公开(公告)号：DE69918631T2

公开(公告)日：2005-08-11

申请号：DE69918631

申请日：1999-10-05

Applicant: LUCENT TECHNOLOGIES INC

Inventor： DEGANI YINON ,  GREGUS JEFFREY ALAN

IPC: H05K3/34 ,  H01L21/60 ,  H01L23/485

Abstract: The specification describes techniques for applying under bump metallization (UBM) for solder bump interconnections (58) on IC chips (41) with Al bonding sites (54,55). The UBM of the invention comprises a copper layer (56) applied directly to the aluminum bonding sites (54,55). Reliable bonds are obtained if the Al surface is a nascent surface. Such a surface can be provided by back sputtering an aluminum bonding site (54), or by a freshly sputtered aluminum layer (55). The copper layer (56) is deposited on the nascent aluminum surface in e.g. a cluster tool without breaking vacuum. The UBM can be patterned using subtractive techniques.

公开(公告)号：DE69710248T2

公开(公告)日：2002-08-14

申请号：DE69710248

申请日：1997-04-22

Applicant: LUCENT TECHNOLOGIES INC

Inventor： DEGANI YINON ,  GREENBERG LAWRENCE ARNOLD

IPC: H01L21/56 ,  H01L21/60

Abstract: A technique for enabling sufficient flow of flux cleaning fluids (230) and an underfill material (300) in the relatively low-profile gap (140) between a flip-chip bonded IC chip (1) and a substrate (10), such as a printed circuit board, is to provide at least one aperture (30) in the substrate under the IC chip. The use of such an aperture enables, for example, flux cleaning fluid to flow (240) through the aperture into the low-profile gap between the IC chip and the substrate surface, such as by the application of pressure or by gravity, which then exits through openings between formed interconnect bonds (110) at a sufficient flow rate to adequately remove flux residues. An epoxy underfill (300) to the IC chip can be formed in a similar manner. For example, a relatively thick bead of epoxy (400), such as on the order of the thickness of the IC chip (1), is deposited or stencil printed on the substrate surface (15) around the edges of the IC chip and capillary action is then relied upon to draw the epoxy into the low-profile gap (140). Undesirable air pockets which otherwise would develop form the displaced air as the epoxy flows into the low-profile gap can advantageously escape through the aperture (30) of the invention.

公开(公告)号：CA2198305A1

公开(公告)日：1997-11-02

申请号：CA2198305

申请日：1997-02-24

Applicant: LUCENT TECHNOLOGIES INC

Inventor： DEGANI YINON ,  GREENBERG LAWRENCE ARNOLD

IPC: H01L21/56 ,  H01L21/60 ,  H01L23/12

Abstract: A technique for enabling sufficient flow of flux cleaning fluids and an underfill material in the relatively low-profile gap between a flip-chip bonded IC chip and a substrate, such as a printed circuit board, is to provide at least one aperture in the substrate under the IC chip. The use of such an aperture enables, for example, flux cleaning fluid to flow through the aperture into the low-profile gap between the IC chip and the substrate surface, such as by the application of pressure or by gravity, which then exits through openings between formed interconnect bonds at a sufficient flow rate to adequately remove flux residues. An epoxy underfill to the IC chip can be formed in a similar manner. For example, a relatively thick bead of epoxy, such as on the order of the thickness of the IC chip, is deposited or stencil printed on the substrate surface around the edges of the IC chip and capillary action is then relied upon to draw the epoxy into the low-profile gap. Undesirable air pockets which otherwise would develop form the displaced air as the epoxy flows into the low-profile gap can advantageously escape through the aperture of the invention.

公开(公告)号：DE69840118D1

公开(公告)日：2008-11-27

申请号：DE69840118

申请日：1998-07-07

Applicant: LUCENT TECHNOLOGIES INC

Inventor： DEGANI YINON ,  TAI KING LIEN ,  SMITH PETER R

IPC: H01L23/02 ,  H01L25/065 ,  H01L23/00 ,  H01L23/04 ,  H01L23/12 ,  H01L23/538 ,  H01L23/66 ,  H01L25/04 ,  H01L25/18

公开(公告)号：DE60112003D1

公开(公告)日：2005-08-25

申请号：DE60112003

申请日：2001-05-31

Applicant: LUCENT TECHNOLOGIES INC ,  AGERE SYST OPTOELECTRONICS

Inventor： DEGANI YINON ,  DUDDERAR THOMAS DIXON ,  TAI KING LIEN

IPC: G02B26/08 ,  B81B7/00 ,  B81B7/02 ,  H01L23/538

Abstract: The specification describes interconnection strategies for micro-electronic machined mechanical systems (MEMS). Typical MEMS device array comprise a large number of individual mechanical devices each electrically driven by multi-chip modules (MCMs). High density interconnection is achieved by mounting the MCMs mounted on both sides of a system interconnection substrate. Overall interconnection length is reduced by locating the MCMs in a common circuit driving a given mechanical element on opposite sides of the system interconnection substrate and interconnecting them using vias through the substrate. Rapid replacement/repair is facilitated by mounted all active elements in sockets using contact pin arrays for electrical connections. In service reliability is obtained by providing spare sockets for redundant MCMs.