公开(公告)号：JP2003298070A

公开(公告)日：2003-10-17

申请号：JP2002103882

申请日：2002-04-05

Applicant: Matsushita Electric Works Ltd ,  松下電工株式会社

Inventor： MIYAJIMA HISAKAZU ,  OKA NAOMASA ,  OGIWARA ATSUSHI ,  OKUTO TAKASHI ,  TAKAMI SHIGENARI ,  KANI MITSUHIRO

IPC: G01L9/00 ,  H01L29/84

Abstract: PROBLEM TO BE SOLVED: To provide a method by which a semiconductor device having a structure that has a possibility of becoming mechanically fragile such as a thin wall section can be formed without breaking the device.
SOLUTION: The semiconductor device manufactured by this method has thin wall sections 21 and thick wall sections 11 and 11 provided around the thin wall sections 21, both of which are formed by engraving a semiconductor substrate 1. The semiconductor substrate 1 is divided into individual elements by etching the prescribed positions of the thick wall sections 11 and 11 from both surfaces of the substrate 1.
COPYRIGHT: (C)2004,JPO

Abstract translation: 要解决的问题：提供一种可以形成具有可能变得机械易碎的结构的半导体器件如薄壁部分的方法，而不会破坏器件。 解决方案：通过该方法制造的半导体器件具有薄壁部分21和设置在薄壁部分21周围的厚壁部分11和11，它们都是通过雕刻半导体衬底1形成的。半导体衬底1被分割 通过从基板1的两个表面蚀刻厚壁部分11和11的规定位置而成为单个元件。版权所有（C）2004，JPO

公开(公告)号：JP2003294556A

公开(公告)日：2003-10-15

申请号：JP2002093480

申请日：2002-03-29

Applicant: Matsushita Electric Works Ltd ,  松下電工株式会社

Inventor： MIYAJIMA HISAKAZU ,  OKA NAOMASA ,  OGIWARA ATSUSHI ,  OKUTO TAKASHI ,  TAKAMI SHIGENARI ,  KANI MITSUHIRO

IPC: G01L9/00 ,  B81B3/00 ,  B81C1/00 ,  H01L21/301 ,  H01L21/308 ,  H01L29/84

Abstract: PROBLEM TO BE SOLVED: To provide a manufacturing method for forming a semiconductor device having a brittle structure such as a thin-walled part without damaging the device. SOLUTION: In this method, the semiconductor device having the thin-walled part 21 and a thick-walled part 11 provided around the thin-walled part 21 is manufactured by applying impression to a semiconductor substrate 1. The manufacturing method of the semiconductor device is characterized by being equipped with a first process for etching so that the position corresponding to the thin-walled part 21 is left thicker than a prescribed thickness, a second process for dicing the thick-walled part 11, to thereby split a chip having the thin-walled part 21 from the semiconductor substrate 1, and a third process for applying the impression until the position corresponding to the thin-walled part 21 has the prescribed thickness, to thereby form the thin-walled part 21. COPYRIGHT: (C)2004,JPO

Abstract translation: 要解决的问题：提供一种用于形成具有诸如薄壁部分的脆性结构的半导体器件的制造方法，而不损坏器件。 解决方案：在该方法中，通过向半导体衬底1施加印模来制造具有设置在薄壁部21周围的薄壁部21和厚壁部11的半导体器件。制造方法 半导体器件的特征在于配备有第一蚀刻工艺，使得对应于薄壁部分21的位置比规定厚度厚，第二种用于切割厚壁部分11的工艺，从而将芯片 具有来自半导体基板1的薄壁部分21，以及用于施加印模直到与薄壁部分21相对应的位置具有规定厚度的第三处理，从而形成薄壁部分21。 版权所有（C）2004，JPO

公开(公告)号：JP2000164698A

公开(公告)日：2000-06-16

申请号：JP33247398

申请日：1998-11-24

Applicant: MATSUSHITA ELECTRIC WORKS LTD

Inventor： OGIWARA ATSUSHI ,  OKA NAOMASA ,  OKUTO TAKASHI

IPC: H01L21/3205 ,  H01L21/768 ,  H01L23/52

Abstract: PROBLEM TO BE SOLVED: To provide with less number of processes a method for manufacturing a semiconductor device, in which a plurality of wirings electrically insulated from one another, are connected to one another on a semiconductor substrate. SOLUTION: In the method for manufacturing a semiconductor device, in which a plurality of wirings 3 and 5, electrically insulated from each other are connected to each other on a semiconductor substrate 1, a groove 10 communicating with a plurality of wirings 3 and 5 is formed by sand-blasting with a film resist 9 for sand-blast as a mask, and then a metal film 8 is formed on the inner surface of the groove 10, thereby a plurality of wirings 3 and 5 are connected electrically to each other.

公开(公告)号：JPH10335585A

公开(公告)日：1998-12-18

申请号：JP13691797

申请日：1997-05-27

Applicant: MATSUSHITA ELECTRIC WORKS LTD

Inventor： OKA NAOMASA ,  TAKAKURA NOBUYUKI

IPC: H01L27/04 ,  H01L21/822

Abstract: PROBLEM TO BE SOLVED: To provide a semiconductor device, together with its manufacturing method, wherein a resistance value is adjusted with precision. SOLUTION: A V-shape groove part 1a is formed on one main surface of a single crystal silicon substrate 1, and on that surface side, a poly-crystal silicon layer 3a is formed through a silicon oxide film 2. Here, the polysilicon layer 3a is allocated at such place as the groove part 1a is formed, while so formed that its surface is recessed in V-shape there. A thin silicon oxide film 4 is formed on the surface of the polysilicon layer 3a, and over it, polysilicon layers 3b and 3c are so formed as to cover the groove part 1a at each groove part 1a formation point. An inter-layer insulation film 5 is formed on such surface side of the single crystal silicon substrate 1 as the polysilicon layers 3a-3c are formed, while the polysilicon layers 3a-3c have a part of the silicon oxide film 4 and the inter-layer insulation film 5 formed over them are removed, to be electrically connected to aluminum wiring electrodes 6a-6c.

公开(公告)号：JPH10335447A

公开(公告)日：1998-12-18

申请号：JP14171797

申请日：1997-05-30

Applicant: MATSUSHITA ELECTRIC WORKS LTD

Inventor： OGIWARA ATSUSHI ,  OKA NAOMASA ,  OKUTO TAKASHI ,  KAMAKURA MASATOMO

IPC: H01L21/762 ,  H01L21/02 ,  H01L21/76 ,  H01L27/12

Abstract: PROBLEM TO BE SOLVED: To provide a method for manufacturing a dielectric isolation substrate which can prevent generation of a void at a tip end of a V-shaped groove. SOLUTION: A polysilicon layer 5a is formed as deposited on a side of a single crystal silicon substrate 1 having a groove 1a made therein by a CD process using trichlorosilane and hydrogen gases as source gases. At this time, a temperature within a reactor where the polysilicon layer 5a is to be deposited is previously set at less than 1150 deg.C. Next, the temperature within the reactor is set at 1150 deg.C or more without causing any change in the flow rates of the source gases, to thereby form an upper polysilicon layer 5b through deposition. Finally, the substrate is polished from a side of the substrate not provided with the layer 5b until the layer 5a buried in the groove 1a is exposed, to thereby silicon single crystal islands 6 of the substrate 1 covered on its bottom and side faces with a silicon oxide film 4. That is, the layer 5b is polished down to a predetermined thickness.

公开(公告)号：JPH1050939A

公开(公告)日：1998-02-20

申请号：JP20150996

申请日：1996-07-31

Applicant: MATSUSHITA ELECTRIC WORKS LTD

Inventor： OKA NAOMASA ,  TAKAKURA NOBUYUKI

IPC: H01L21/28 ,  H01L21/768 ,  H01L21/822 ,  H01L23/522 ,  H01L27/04

Abstract: PROBLEM TO BE SOLVED: To allow easy adjustment of a resistance value. SOLUTION: A silicon oxide film 2 is formed on a single crystal silicon substrate 1 and a polycrystalline silicon film 3 containing a large amount of n-type impurities and patterned in a prescribed form is formed on the silicon oxide film 2. A silicon oxide film 4 in the thin film shape is formed by performing thermal oxidation on the surface of the polycrystalline silicon film 3 and a plurality of polycrystalline films 5 containing a large amount of n-type impurities and patterned in the prescribed shape are formed on the silicon oxide film 4. A silicon oxide film 6 is formed on the arrangement side of the silicon oxide film 2 in the single crystal silicon substrate 1 and an opening part reaching the polysilicon films 3, 5 on the silicon oxide film 6 and wiring electrodes 7, 8 are formed imbedded in the opening parts.

公开(公告)号：JPH05291409A

公开(公告)日：1993-11-05

申请号：JP9548492

申请日：1992-04-15

Applicant: MATSUSHITA ELECTRIC WORKS LTD

Inventor： SAIJO TAKASHI ,  OKA NAOMASA

IPC: H01L23/522 ,  H01L21/768 ,  H01L21/90

Abstract: PURPOSE:To make it possible to form multilayer wiring which has accurate electrical contacts between wiring separated by an insulating layer to up and down sides on a semiconductor substrate. CONSTITUTION:A conductive portion 9 is formed for taking electrical contacts at a predetermined position on the surface of the first wiring in a multilayer wiring formation method to semiconductor substrate with which the second wiring 14 electrically being in contact with the first wiring is formed through an insulation layer 13 at a predetermined position separated to up and down sides through the insulation layer 13 over the first wiring 4 provided on a semiconductor substrate 1. Moreover, the insulation layer 13 is formed on the first wiring forming surface in such a manner that its top portion is exposed to the surface, and the second wiring is formed in this multilayer wiring formation method on semiconductor substrate.

公开(公告)号：JPS5961931A

公开(公告)日：1984-04-09

申请号：JP17278182

申请日：1982-09-30

Applicant: Matsushita Electric Works Ltd

Inventor： OKA NAOMASA

IPC: H01L21/22 ,  H01L21/31

CPC classification number: H01L21/31

Abstract: PURPOSE:To prevent welding of a pulling bar to a quartz tube by thermal deformation even under a high temperature and long time process by engaging the end point of pulling bar with a boat rotatably in the circumferential direction and by connecting the rear end thereof to a motor rotatably in the circumferential direction. CONSTITUTION:When a diving body 10 moves on a guide rail 12, a pulling bar 9 connected to a variable speed motor 11 moves forward and backward in the axial direction within the quartz tube 11 in parallel with the guide rail 12, pushing or pulling the boat 5 connected at the recessed groove 8 at the end thereof into or from the quartz tube 2. The recessed groove 8 of the pulling bar 9 is engaged with the erected wall at the end of boat 5. In such a structure, the boat 5 is pushed into the quartz tube 2 and thereby the pulling bar 9 rotates every slowly in the circumferential direction by a variable speed motor 11 during reaction, such as oxidation and diffusion under a high temperature. Accordingly, it is never deformed to one direction only., due to heat.

Abstract translation: 目的：为了防止拉杆在高温和长时间的过程中通过热变形将拉杆焊接到石英管上，通过将拉杆的端点与舟轮在圆周方向上可旋转地接合并将其后端连接到 电机沿圆周方向可旋转。 构成：当潜水体10在导轨12上移动时，与变速马达11连接的拉杆9与导轨12平行地在石英管11内沿轴向前后移动，推动或​​拉动 船5在其凹槽8处连接到石英管2的一端。拉杆9的凹槽8与船5的端部处的竖立的壁接合。在这种结构中，船5 被推入石英管2中，因此拉杆9在反应期间如高温下的氧化和扩散等，通过变速马达11在圆周方向上缓慢旋转。 因此，由于热而不能仅向一个方向变形。

公开(公告)号：JP2006337744A

公开(公告)日：2006-12-14

申请号：JP2005162692

申请日：2005-06-02

Applicant: Matsushita Electric Works Ltd ,  松下電工株式会社

Inventor： YOSHIHARA TAKAAKI ,  FUKUSHIMA HIROSHI ,  HARADA HIROSHI ,  NOGE HIROSHI ,  OKA NAOMASA ,  SUZUKI YUJI ,  JOMI HIROTAKA ,  USHIYAMA NAOKI

IPC: G02B26/08 ,  B81B3/00

Abstract: PROBLEM TO BE SOLVED: To obtain a light switch which is vertically moved while keeping a horizontal attitude without tilting a mirror unit as far as possible.
SOLUTION: In the light switch, a structure body 2 is provided on either an actuator 3 side or a base part 1b side between the actuator 3 and the base part 1b, and the structure body is made contact with or connected to the other side at approximately one point.
COPYRIGHT: (C)2007,JPO&INPIT

Abstract translation: 要解决的问题：为了获得尽可能保持水平姿态而不倾斜反射镜单元的垂直移动的光开关。 解决方案：在光开关中，结构体2设置在致动器3侧或致动器3与基部1b之间的基部1b侧上，并且结构体被接触或连接到 另一侧约一点。 版权所有（C）2007，JPO＆INPIT

公开(公告)号：JP2005278332A

公开(公告)日：2005-10-06

申请号：JP2004089739

申请日：2004-03-25

Applicant: Matsushita Electric Works Ltd ,  松下電工株式会社

Inventor： KONO KIYOHIKO ,  HARADA HIROSHI ,  OKA NAOMASA ,  NOGE HIROSHI ,  SUZUKI YUJI ,  OGIWARA ATSUSHI ,  YOSHIHARA TAKAAKI ,  JOMI HIROTAKA

IPC: G02B26/08 ,  H02N1/00

Abstract: PROBLEM TO BE SOLVED: To provide an actuator high in mobile stability by reducing unnecessary static power and easy in mobile control, and an optical device. SOLUTION: The actuator comprises a first comb-shaped electrode having a plurality of first electrode fingers 13, and a second comb-shaped electrode having a plurality of electrode fingers 14a, 14b that are engaged with the plurality of first electrode fingers 13. The width of the first electrode finger 13 at the finger tip 19a of the first electrode finger 13 is wider than the root 20 of the first electrode finger 13. COPYRIGHT: (C)2006,JPO&NCIPI

Abstract translation: 要解决的问题：通过减少不必要的静电和容易的移动控制来提供高移动性的致动器以及光学装置。 解决方案：致动器包括具有多个第一电极指13的第一梳状电极和具有与多个第一电极指13接合的多个电极指14a，14b的第二梳状电极 第一电极指13的指尖19a处的第一电极指13的宽度比第一电极指13的根部20宽。（C）2006年，JPO和NCIPI