公开(公告)号：WO1982003141A1

公开(公告)日：1982-09-16

申请号：PCT/US1982000294

申请日：1982-03-08

Applicant: NCR CORP

Inventor： NCR CORP ,  BRUCKNER RONALD LOUIS ,  KHAMARE ISHWAR SINGH ,  VOYER JOSEPH LARRY ,  HAMILTON RODNEY VICTOR ,  GHEORGHIU PAUL

IPC: H02M03/335

CPC classification number: H02M3/3378

Abstract: A power supply includes a digital controller (10) which generates pulse-width modulated control signals for controlling the duty cycles of switching transistors (36) for the purpose of regulating the output voltage of the power supply. In order to generate the control signals, the controller includes an adding circuit arranged to add a digital value representing a standard pulse-width modulated control signal to another digital value dependent on the difference between successive digital values each representing an instantaneous value of an output voltage level of the power supply. The controller also includes circuits for controlling a starting up routine for the power supply and for selecting an operating switching frequency. Since the controller is digital in construction, integrated circuit chips may be used so that the power supply is of simple construction and of low cost.

Abstract translation: 电源包括数字控制器（10），其产生用于控制开关晶体管（36）的占空比的脉冲宽度调制控制信号，以调节电源的输出电压。 为了产生控制信号，控制器包括一个相加电路，该相加电路被布置成将表示标准脉冲宽度调制控制信号的数字值加到另一个数字值上，这取决于连续数字值之间的差值，每个数字值表示输出电压的瞬时值 电源水平。 控制器还包括用于控制电源的启动程序和选择工作开关频率的电路。 由于控制器是数字化的，所以可以使用集成电路芯片，使电源结构简单，成本低廉。

公开(公告)号：WO1982002131A1

公开(公告)日：1982-06-24

申请号：PCT/US1981001677

申请日：1981-12-16

Applicant: NCR CORP

Inventor： NCR CORP ,  VAN DRIEST HANS

IPC: H04L27/22

CPC classification number: H04L27/2273

Abstract: Procede et dispositif servant a demoduler un signal recu de porteuse modulee en phase et codee de maniere differentielle dans lequel le signal de porteuse subit un decalage de phase pendant chaque periode de modulation de la porteuse pour representer l'une des quatre paires de bits binaires ou dibits. Une premiere horloge produit les premieres impulsions d'horloge (RDCL) lors de la detection du commencement de chaque intervalle de donnees dans le signal de porteuse recue, et une deuxieme horloge fournit les deuxiemes impulsions d'horloge (77) reglees par rapport a la phase des premieres impulsions d'horloge. Les deuxieme impulsions d'horloge sont utilisees pour synchroniser le demodulateur lors de la determination de l'emplacement de la periode de modulation de la porteuse recue. Afin de surmonter les erreurs detectees lors du decodage du signal de porteuse, le reglage de la phase de la deuxieme horloge est supprime lorsque les dibits 00 et 10 sont en train d'etre decodes. On a remarque qu'avec cette construction la deuxieme horloge peut se desynchroniser lors de la reception de longue chaine dibits 00 ou 10. Afin de resoudre ce probleme, apres le decodage d'un nombre predetermine de dibits 10 ou 00 continues, la suppression du reglage de la phase de la deuxieme horloge est invalidee.

公开(公告)号：WO1982002130A1

公开(公告)日：1982-06-24

申请号：PCT/US1981001666

申请日：1981-12-15

Applicant: NCR CORP

Inventor： NCR CORP ,  COOK DONALD M

IPC: H04L27/22

CPC classification number: H04L7/0066

Abstract: In order to recover the clock signal from a Manchester encoded serial data stream which is resistant to phase variations arising between the data bit signals in the data stream, the data stream is delayed by a one-quarter bit period and a three-quarter bit period to provide signals (QBT, TQBT) which are combined in a circuit (1, 2, 3) to provide a clock signal (RF). The circuit includes a latch (1) which is actuated by signals (QBT, TQBT) and a signal (LLF) representing decoded data combined in logic gates (2) and applied to the inputs of the latch.

Abstract translation: 为了从曼彻斯特编码的串行数据流恢复时钟信号，该串行数据流对数据流中的数据位信号之间产生的相位变化具有抵抗性，数据流被延迟四分之一位周期和四分之三位位周期 提供组合在电路（1,2,3）中以提供时钟信号（RF）的信号（QBT，TQBT）。 电路包括由信号（QBT，TQBT）和表示在逻辑门（2）中组合的解码数据的信号（LLF）启动并被施加到锁存器的输入端的锁存器（1）。

公开(公告)号：WO1982002112A1

公开(公告)日：1982-06-24

申请号：PCT/US1981001560

申请日：1981-11-25

Applicant: NCR CORP

Inventor： NCR CORP ,  ALLBRIGHT FORREST E

IPC: H01H13/70

CPC classification number: H01H13/14 ,  H01H13/7006 ,  H01H2221/016

Abstract: Keyboard assembly including a switching assembly (20) having a plurality of pressure-operated switches (24) and a key array (12) overlying the switching assembly (20) and having a plurality of keys (36) formed integrally with a support (38), each key (36) being hinged at one side to the support (38) and having switch actuating means (44) formed integrally therewith. A disadvantage of prior art arrangements of this kind is that the force of restoring the operated key to its home position is not sufficiently positive for entirely satisfactory operation, as the arrangement relies on the resilience of the hinges and of the switch for restoring the key. The invention overcomes this disadvantage by providing switch actuators (44) of a resilient construction which are arranged to assist in restoring the respective key (36) to its home position following operation of the key (36). In a preferred embodiment, each switch actuator (44) has a first end connected to one side of the respective key (36) by means of a toggle hinge (46, 48, 50) and has a second, free end (56) extending across the key (36) to a position beyond the opposite side of the key (36).

Abstract translation: 键盘组件包括具有多个压力开关（24）的开关组件（20）和覆盖开关组件（20）的键阵列（12），并且具有与支撑件（38）一体形成的多个键 ），每个键（36）在一侧铰接到支撑件（38）并具有与其一体形成的开关致动装置（44）。 这种现有技术布置的缺点在于，为了完全令人满意的操作，将操作的键恢复到其原始位置的力不足够，因为排列依赖于铰链和用于恢复钥匙的开关的弹性。 本发明通过提供弹性结构的开关致动器（44）来克服这个缺点，该开关致动器（44）布置成在键（36）的操作之后有助于将相应的键（36）恢复到其原始位置。 在优选实施例中，每个开关致动器（44）具有通过肘节铰链（46,48,50）连接到相应键（36）的一侧的第一端，并且具有延伸的第二自由端（56） 穿过键（36）到超过键（36）的相对侧的位置。

公开(公告)号：WO1982001852A1

公开(公告)日：1982-06-10

申请号：PCT/US1981001537

申请日：1981-11-19

Applicant: NCR CORP

Inventor： NCR CORP ,  CORDES RICHARD E ,  SEARS RONALD J

IPC: B41J05/12

CPC classification number: B41J5/26 ,  H01H13/50

Abstract: Keyboard (20) having a plurality of keys (12, 14, 16) thereon at least one of which is designated as a critical function key (16), wherein each key is movable from a home position along an actuation path to its operated position and has means (24) for restoring it towards its home position. In prior art keyboards of this kind important data may be lost by accidental actuation of a critical function key, e.g. a "Delete" key. The present invention overcomes this problem by providing a keyboard in which a critical function key (16) has a warning member (40, 60) associated therewith which causes the force required to move the key to its operated position to be significantly greater than that required to move each of the other keys not having a warning member associated therewith. The increase in force provides tactile feedback to an operator of the keyboard before the critical function key's operated position is reached to thereby warn said operator that he is about to operate the key (16). In one embodiment, the warning member (40, 60) is made of resilient material, has a generally washer-like shape, and is positioned around the key stem (18) and under the key cap (26) of the critical function key (16).

Abstract translation: 键盘（20）具有多个键（12,14,16），其中至少一个键被指定为临界功能键（16），其中每个键可以沿着致动路径从原始位置移动到其操作位置 并且具有用于将其恢复到其原始位置的装置（24）。 在这种现有技术的键盘中，重要的数据可能由于关键功能键的意外启动而丢失，例如， 一个“删除”键。 本发明通过提供一种键盘来克服这个问题，其中临界功能键（16）具有与其相关联的警告构件（40,60），其使得将键移动到其操作位置所需的力显着大于所需要的力 以移动其中没有与其相关联的警告构件的每个其他键。 在达到关键功能键的操作位置之前，力的增加向键盘的操作者提供触觉反馈，从而警告操作者他即将操作钥匙（16）。 在一个实施例中，警告构件（40,60）由弹性材料制成，具有大致垫圈状的形状，并且位于关键杆（18）周围的关键功能键的键帽（26）周围 16）。

公开(公告)号：WO1982001768A1

公开(公告)日：1982-05-27

申请号：PCT/US1981001510

申请日：1981-11-12

Applicant: NCR CORP

Inventor： NCR CORP ,  WEBER HELMUT ,  REITBERGER PETER H

IPC: G01D18/00

CPC classification number: B41J2/125

Abstract: Ink droplet sensing apparatus for use in an ink jet printer for detecting errors resulting from the omission or misplacement or from the reduced size of a printed dot. In one embodiment the apparatus includes a membrane (14) having a metallic coating thereon which membrane (14) is placed over one side of an electrode member (10) having an uneven surface. Voltage is applied to the electrode member (10) and the metallic coating and ink droplets (20) impinging on the membrane (14) momentarily deflect the membrane and cause a change of capacitance which in turn causes a voltage change at the electrode member (10). The voltage change is coupled through a capacitor (22) and an amplifier (24) to recognition logic for evaluation of the signals.

Abstract translation: 用于喷墨打印机的墨滴检测装置，用于检测由于省略或错位或缩小的打印点尺寸导致的错误。 在一个实施例中，所述装置包括其上具有金属涂层的膜（14），所述膜（14）被放置在具有不平坦表面的电极构件（10）的一侧上。 电压被施加到电极部件（10）上，并且撞击在膜（14）上的金属涂层和墨滴（20）瞬时地偏转膜并导致电容的变化，这又导致电极部件（10）处的电压变化 ）。 电压变化通过电容器（22）和放大器（24）耦合到用于评估信号的识别逻辑。

公开(公告)号：WO1982001606A1

公开(公告)日：1982-05-13

申请号：PCT/US1981001411

申请日：1981-10-19

Applicant: NCR CORP

Inventor： NCR CORP ,  KENYON KEITH L

IPC: G06F03/12

CPC classification number: G06F5/16 ,  G06F3/1295

Abstract: The hard copy printing of data that is being simultaneously displayed on a cathode ray tube and outputted therefrom requires the buffering of such data in order to compensate for the varying data rates existing between such devices and also to convert the display data, which is normally in interlaced form, into a data format that can be handled by the printer. In order to permit such hard copy printing of such cathode ray output data, data signals are received by a latch (32) and thereafter transmitted to a buffer (34) having two parts (36, 38) so that the display data can be stored in the memory as a sequence of horizontal strips under control of a write address counter (42) and a multiplexer 940), with the strip data in one memory part being read out under control of a read address counter 944) and the multiplexer to the printer, the reading being interrupted by a read/write logic (46) in intervals when the data for the next adjacent strip is being written into a memory part is done on an alternate line basis under control of an external signal (FIELDO), with the omitted lines being filled in a subsequent write operation so as to convert the interlaced input to a standard printer format. At appropriate times, the two pans of the memory are switched so that the readout from memory (34) on output (20) for the printing is carried out from the part into which information has just been written, and subsequent writing takes place in the part of the memory which has been cleared during the preceding read operation.

Abstract translation: 同时显示在阴极射线管上并从其输出的数据的硬拷贝打印需要缓冲这些数据，以便补偿这些设备之间存在的变化的数据速率，并且还将通常在 隔行扫描的形式，成为可由打印机处理的数据格式。 为了允许这种阴极射线输出数据的这种硬拷贝打印，数据信号由锁存器（32）接收，然后被发送到具有两部分（36,38）的缓冲器（34），以便可以存储显示数据 在存储器中作为在写地址计数器（42）和多路复用器940的控制下的一系列水平条带，其中一个存储器部分中的条带数据在读地址计数器944的控制下读出），并且多路复用器到 打印机，当外部信号（FIELDO）的控制下，在下一个相邻条带的数据被写入存储器部分的间隔期间，读取被读/写逻辑（46）中断，并以 省略的行被填充在随后的写入操作中，以将隔行输入转换为标准打印机格式。 在适当的时刻，切换存储器的两个盘，使得用于打印的输出（20）上的存储器（34）的读出是从刚刚写入信息的部分进行的，随后的写入在 在上一次读取操作期间被清除的存储器的一部分。

公开(公告)号：WO1982001429A1

公开(公告)日：1982-04-29

申请号：PCT/US1981001340

申请日：1981-10-05

Applicant: NCR CORP

Inventor： NCR CORP ,  ARMSTRONG ROLFE D

IPC: G06F09/00

CPC classification number: G06F9/4486

Abstract: A stack (30) is provided in a pipelined data processor having a plurality of control registers including a fetch control register and an execution control register associated with respective stages of the processor. The stack comprises a memory stack (303), an address register (304), and a counter-register (302) interposed between the memory stack and the control registers of the data processor. In order to speed up operation of the stack, the counterregister (302) is always made to store the latest entry into the memory stack (303), that is the top of the stack, such that the latest entry into the stack (303) is immediately available to the control registers of the data processor thereby eliminating a memory access to the stack (303).

Abstract translation: 在具有多个控制寄存器的流水线数据处理器中提供堆栈（30），该控制寄存器包括与处理器的各个级相关联的获取控制寄存器和执行控制寄存器。 堆叠包括插入在存储器堆栈和数据处理器的控制寄存器之间的存储器堆栈（303），地址寄存器（304）和计数器寄存器（302）。 为了加快堆栈的操作，总是使得计数器寄存器（302）将最新条目存储到作为堆栈顶部的存储堆栈（303）中，使得最新进入堆栈（303） 立即可用于数据处理器的控制寄存器，从而消除对堆栈的存储器访问（303）。

公开(公告)号：WO1981001827A1

公开(公告)日：1981-07-09

申请号：PCT/US1980001720

申请日：1980-12-23

Applicant: NCR CORP

Inventor： NCR CORP ,  HORST W ,  GRANZOW R

IPC: B65H07/14

CPC classification number: B65H7/14 ,  B65H7/12 ,  B65H2553/41 ,  B65H2701/1912

Abstract: An apparatus for detecting the passage of multiple documents (10) in a transport system, including a pair of rollers (20, 22) between which said documents (10) are arranged to pass and which are displaceable by an extend dependent on the thickness of one document or multiple documents simultaneously passing therebetween. This displacement is measured by the movement of a graded density translucent member (34) between the photodiode (46) and sensor (40) of a detector (36). Electronic circuitry associated with the detector (36) indicates the presence of a record member (10) between the rollers (20, 22), and also the presence of multiple record members (10). The graded density of the member (34) allows the circuitry to detect only the displacement from the static position of the rollers (20, 22) eliminating the necessity for adjustment due to wear, temperature, and other mechanical factors.

Abstract translation: 一种用于检测传送系统中的多个文件（10）的通过的装置，包括一对辊（20,22），所述一对辊（20,22）在所述文件（10）之间布置成通过，并且可根据 一个文件或多个文件同时通过它们。 该位移通过光电二极管（46）和检测器（36）的传感器（40）之间的渐变密度透光部件（34）的运动来测量。 与检测器（36）相关联的电子电路指示在辊（20,22）之间存在记录部件（10），以及存在多个记录部件（10）。 构件（34）的分级密度允许电路仅检测来自辊（20,22）的静态位置的位移，消除了由于磨损，温度和其它机械因素而需要进行调整。

公开(公告)号：WO1981001758A1

公开(公告)日：1981-06-25

申请号：PCT/US1980001597

申请日：1980-11-26

Applicant: NCR CORP

Inventor： NCR CORP ,  OOSTERBAAN D ,  WILLIAMS G

IPC: G06F03/00

CPC classification number: G06F17/30949

Abstract: Hashing of a key data signal is accomplished by utilizing a pseudo-random number signal generator (22, 24, 26, 28 and 30) for generating a randomized signal in response to shift signals and the key data signals and an output register (32) for serially receiving the generated pseudo-random signal and for providing segments of the serially-received signal at its output. A counting circuit (36, 56) responsive to a preselected number of shift signals provides an output valid signal when the preselected number of shift signals has occurred and further shifts the pseudo-random number signal generator an amount corresponding to the preselected number of shift signals. The pseudo-random number signal generator includes a pair of cross-coupled shift registers (26, 28). The method of hashing the key data utilizes the steps of presetting the pseudo-random number generator and the counting circuit to an initialized state. The counting circuit is then loaded with a predetermined count whereupon key data is entered into the pseudo-random number generator so as to randomize the key data. A valid signal is provided when a block of key data has been hashed and the steps of entering the key data and providing a valid signal upon the occurrence of each block of key data is repeated until all key data blocks have been hashed.