21.
    发明专利
    未知

    公开(公告)号:DE69623754T2

    公开(公告)日:2003-05-08

    申请号:DE69623754

    申请日:1996-05-31

    Abstract: The invention relates to a voltage regulator connected between first (VS) and second (GND) voltage references and having an output terminal (O1) for delivering a regulated output voltage (Vout), which voltage regulator comprises at least one voltage divider (11), connected between the output terminal (O1) and the second voltage reference (GND), and a serial output element (18) connected between the output terminal (O1) and the first voltage reference (VS), the voltage divider (11) being connected to the serial output element (18) by a first conduction path which includes at least one error amplifier (EA) of the regulated output voltage (Vout) whose output is connected to at least one driver (DR) for turning off the serial output element (18), the voltage regulator comprising, between the voltage divider (11) and the serial output element (18), at least a second conduction path for turning off the serial output element (18) according to the value of the regulated output voltage (Vout), in advance of the action of the first conduction path. The invention also concerns a method of turning off a serial output element (18) as a regulated output voltage (Vout) from a voltage regulator (10) changes.

    22.
    发明专利
    未知

    公开(公告)号:DE69421083D1

    公开(公告)日:1999-11-11

    申请号:DE69421083

    申请日:1994-11-17

    Abstract: The purpose of the present invention is to supply a method and a circuit simple and accurate enough to protect at least one transistor against exceeding a complex limit implying processing of multiple electrical quantities associated with said transistor. Since in many practical cases said complex limit corresponds to the product of at least two quantities, typically a current and a voltage, the circuit in accordance with the present invention generates electrical signals basically proportional to said quantities, multiplies them, compares the product with a reference signal corresponding to the limit placed on the transistor and acts on the transistor in such a way that said limit is not exceeded. Advantageously the multiplication of currents can be provided simply by means of connection in series of bipolar transistor junctions at which said currents are supplied to the respective emitters. In this case it is additionally advantageous to generate the reference signal by means of connection in series of the bipolar transistor junctions in such a manner as to have an analogous behaviour of the multiplier and the generator.

    23.
    发明专利
    未知

    公开(公告)号:DE69421075D1

    公开(公告)日:1999-11-11

    申请号:DE69421075

    申请日:1994-06-10

    Abstract: The invention relates to a non-dissipative device for protecting against overloading an integrated circuit having multiple independent channels, being of the type which comprises an input terminal (IN) and an output terminal (OUT) having an integrated switch (1) connected therebetween which consists of a first or input portion (2), a logic gate (PL1) with two inputs (I3,I4) a second or control portion (3), and a third or output portion (4), all in series with one another. The device further comprises a circuit (A) for generating the on- and off-times (Ton,Toff) of the integrated switch (1) connected between an output (O4) of the third portion (4) and an input terminal (I4) of said logic gate (PL1).

    PROGRAMMABLE OUTPUT-VOLTAGE REGULATOR

    公开(公告)号:JPH06168044A

    公开(公告)日:1994-06-14

    申请号:JP15551193

    申请日:1993-06-25

    Abstract: PURPOSE: To maintain the rate, at which output voltage changes during a transient state between two ordinary state value, within a prescribed range, by providing a control means for controlling the charge of the output voltage at the prescribed rate. CONSTITUTION: This regulator is provided with a transistor 2 to be a power element between an input terminal 3 and an output terminal 4, a resistant voltage divider 5 between the output termianl 4 and a ground line 6, and a regulation loop equipped with a differential amplifier 8 and a gain transistor 9. Concerning the amplifier 8, its (-) input termianl is connected to a reference voltage source for supplying a reference voltage and its (+) input termianl is connected to the node of two resistors 11 and 12 forming the voltage divider 5. The gain transistor 9 is placed between the output terminal of the amplifier 8 and the transistor 2. Then, the rate at which the output voltage change during the transient state between two ordinary state values is kept within the prescribed limit by the voltage divider 5, a control input termianl 22, a transistor 25 and a resistor 26.

    25.
    发明专利
    未知

    公开(公告)号:DE69213224D1

    公开(公告)日:1996-10-02

    申请号:DE69213224

    申请日:1992-06-25

    Abstract: A regulator (1) comprising a power element (2) between the input terminal (3) and output terminal (4); and a regulating loop (7) including a differential stage (8) for comparing the output voltage (Vo) of the regulator with a reference voltage (VR) and accordingly driving a gain stage (9) connected to the power element. The output voltage is picked up by the differential stage via a resistive divider (5), the resistance of which varies according to the value of a logic signal at a control input (22). When the resistance of the divider changes, the inputs of the differential stage (8) are so unbalanced as to produce an output voltage up or down ramp equal to the slew rate of the regulating loop (7) and proportional to the bias current of the differential stage. Over the up ramp, the shorting protection circuit (17) is turned off for a predetermined time tau , whereas, over the down ramp, a stage (28) is turned on for absorbing the discharge current of the capacitive load.

    26.
    发明专利
    未知

    公开(公告)号:DE3821396C2

    公开(公告)日:1996-07-11

    申请号:DE3821396

    申请日:1988-06-24

    Abstract: A series voltage regulator includes a protective circuit that detects the collector current from a PBP power transistor and the collector-emitter voltage thereof. Such current and voltage signals are generated, respectively, by an auxiliary PNP transistor having a collector current which is proportional to that of the PNP power transistor, and by a circuit connected between the emitter and the collector of the PNP power transistor. The collector current and collector emitter voltage signals are processed by a circuit which, whenever the current and voltage values are greater than preset maximum values, reduces the PNP power transistor current and maintains it within permissible limits. The protective circuit does not affect the minimum voltage drop between the input and output of the regulator and may be dimensioned so as to use the maximum extent of the S.O.A. of the PNP power transistor.

    27.
    发明专利
    未知

    公开(公告)号:DE3887951T2

    公开(公告)日:1994-05-26

    申请号:DE3887951

    申请日:1988-10-04

    Abstract: A circuit for limiting the transitory's overvoltage across a power transistor connected essentially in series with an inductive load between a supply rail and a ground rail of the circuit and operated to switch ON-OFF said inductive load utilizes a comparator circuit for switching-ON again the power transistor in order to discharge the energy stored in the load's inductance. The voltage across the power transistor is sensed by a first voltage divider, while a reference voltage is obtained by means of a second voltage divider connected between the supply and ground. The circuit is practically insensitive to temperature and to variations of the supply voltage and is easily implemented.

    28.
    发明专利
    未知

    公开(公告)号:DE3887951D1

    公开(公告)日:1994-03-31

    申请号:DE3887951

    申请日:1988-10-04

    Abstract: A circuit for limiting the transitory's overvoltage across a power transistor connected essentially in series with an inductive load between a supply rail and a ground rail of the circuit and operated to switch ON-OFF said inductive load utilizes a comparator circuit for switching-ON again the power transistor in order to discharge the energy stored in the load's inductance. The voltage across the power transistor is sensed by a first voltage divider, while a reference voltage is obtained by means of a second voltage divider connected between the supply and ground. The circuit is practically insensitive to temperature and to variations of the supply voltage and is easily implemented.

    29.
    发明专利
    未知

    公开(公告)号:DE3821396A1

    公开(公告)日:1989-01-05

    申请号:DE3821396

    申请日:1988-06-24

    Abstract: A series voltage regulator includes a protective circuit that detects the collector current from a PBP power transistor and the collector-emitter voltage thereof. Such current and voltage signals are generated, respectively, by an auxiliary PNP transistor having a collector current which is proportional to that of the PNP power transistor, and by a circuit connected between the emitter and the collector of the PNP power transistor. The collector current and collector emitter voltage signals are processed by a circuit which, whenever the current and voltage values are greater than preset maximum values, reduces the PNP power transistor current and maintains it within permissible limits. The protective circuit does not affect the minimum voltage drop between the input and output of the regulator and may be dimensioned so as to use the maximum extent of the S.O.A. of the PNP power transistor.

    30.
    发明专利
    未知

    公开(公告)号:DE69021481T2

    公开(公告)日:1996-04-04

    申请号:DE69021481

    申请日:1990-10-04

    Abstract: A negative overvoltage protection circuit for an insulated vertical PNP transistor (QP) the emitter whereof defines the input (VIN), the collector whereof defines the output (VOUT) and the base whereof is connected to an NPN driving transistor (QN). In order to maximally extend the negative overvoltage which can be applied to the output, the protection circuit comprises an output voltage sensor (R4), a voltage reference (VB), a comparator (Q2,Q3,D1) which is connected in input to the voltage reference (VB) and to the sensor (R4) and generates in output an activation signal when the output voltage of the PNP transistor (QP) becomes smaller than the reference, a switch (Q5) which is controlled by the comparator (Q2,Q3,D1) to switch off the NPN driving transistor (QP) upon the reception of the activation signal and a low-impedance circuit (Q4) which is connected between the emitter and the base of the insulated vertical PNP transistor (QP) and is activated by the activation signal, in a manner suitable for bringing the insulated vertical PNP transistor (QP) practically to BVCBO.

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