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21.发明专利Method for confirming connection of optical fiber with optical transmitter and optical receiver 失效用于确认光纤与光学发射器和光接收器的连接的方法
公开(公告)号：JPH11275014A
公开(公告)日：1999-10-08
申请号：JP7031298
申请日：1998-03-19
Inventor： HORIE KAZUYOSHI , CHOKAI YOICHI , YOSHIDA HIDEKI , OKUBO KENICHI , SHINO KUNINORI
IPC: H04B10/00 , H04B10/07 , H04B10/077 , H04B10/079 , H04B10/40 , H04B10/50 , H04B10/524 , H04B10/60 , H04B10/08 , H04B10/04 , H04B10/06 , H04B10/14 , H04B10/24 , H04B10/26 , H04B10/28
CPC classification number: H04B10/071 , G02B6/4246
Abstract: PROBLEM TO BE SOLVED: To provide an optical transmitter-receiver and a method for conforming the connection of an optical fiber with the optical transmitter- receiver by which connection of the optical fiber (confirmation of a broken fiber) is confirmed surely, regardless of the presence of a 1st optical signal and a 2nd optical signal data. SOLUTION: These optical transmitter and optical receiver sets 1a and 1b respectively are connect to an optical fiber 2 as a communication line in an optical communication circuit to make a 1st optical signal L1 frying to be sent incident on the optical fiber 2 and to receive a 2nd optical signal L2 sent via the optical fiber 2, and comprises a transmission section 1a-1 that makes the 1st optical signal L1 and a 1st connection confirmation signal R1 incident on the optical fiber 2, a reception section 1a-2 that receives the 2nd optical signal L2 and a 2nd connection confirmation signal R2, and a connection monitor section that inhibits the incidence of the 1st optical signal L1 and a 1st connection confirmation signal R1 on the optical fiber 2, when the connection of the optical fiber 2 is not confirmed based on the reception state with a 2nd connection conformation signal R2 at the reception section 1a-2.
Abstract translation: 要解决的问题：提供一种光发送器 - 接收器和用于使光纤与光发射器 - 接收器的连接一致的方法，通过该光发射器 - 接收器可靠地确认光纤的连接（断开的光纤的确认），而不管 存在第一光信号和第二光信号数据。 解决方案：这些光发射机和光接收机组1a和1b分别连接到作为光通信电路中的通信线路的光纤2，以使第一光信号L1油炸发生入射到光纤2上，并接收 经由光纤2发送的第二光信号L2，包括使第一光信号L1和第一连接确认信号R1入射在光纤2上的发送部分1a-1，接收第二光信号L2的接收部分1a-2， 光信号L2和第二连接确认信号R2，以及当光纤2的连接未被确认时，禁止光纤2上的第1光信号L1和第1连接确认信号R1的入射的连接监视部 基于在接收部分1a-2处具有第二连接构造信号R2的接收状态。
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公开(公告)号：JPH11237535A
公开(公告)日：1999-08-31
申请号：JP29850298
申请日：1998-10-20
Applicant: SONY CORP
Inventor： HORIE KAZUYOSHI , NARUMI YOICHI , YOSHIDA HIDEKI , OKUBO KENICHI , SHINO KUNINORI
IPC: G02B6/42 , H04B10/00 , H04B10/2507
Abstract: PROBLEM TO BE SOLVED: To provide an optical transmitter/receiver and an optical transmission/ reception method capable of preventing the generation of crosstalk at the time of executing optical transmission/reception and improving the efficiency of optical transmission/reception. SOLUTION: The optical transmitter/receiver is provided with a light emitting means 2 for emitting a 1st optical signal S1, an optical device 20 for making the 1st optical signal S1 emitted from the means 2 incident upon the incident end of an optical fiber 11 along a direction different from the exiting direction of a 2nd optical signal S2 from the end part 11a of the fiber 11 and a light receiving means 5 for receiving the 2nd optical signal S2 exiting from the end part 11a of the fiber 11. When the 1st optical signal S1 is made incident upon the end part 11a of the fiber 11, the means 5 is arranged on the outside of an arriving area of reflected light generated by reflecting the signal S1 on the end part 11a of the fiber 11.
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公开(公告)号：JPH10150478A
公开(公告)日：1998-06-02
申请号：JP30946496
申请日：1996-11-20
Applicant: SONY CORP
Inventor： YOSHIDA HIDEKI
Abstract: PROBLEM TO BE SOLVED: To discriminate a transmission rate without the intermediary of a host layer and to reduce the burden of the host layer by providing a detection circuit for comparing an assumed transmission rate with the frequency of a clock signal which becomes a prescribed reference by means of receiving a signal to be transmitted and detecting a processing transmission rate. SOLUTION: The frequency of the output signal S11 of a preamplifier 11 is set to be f0, and the frequencies of the output signals S15 and S16 of frequency dividers 15 and 16 to be f1 and f2. When f1
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公开(公告)号：JPH0746093A
公开(公告)日：1995-02-14
申请号：JP19051593
申请日：1993-07-30
Applicant: SONY CORP
Inventor： YOSHIDA HIDEKI , MURAKAMI DAISUKE
Abstract: PURPOSE:To provide a pulse width modulation circuit capable of suppressing the generation of blank pulses and offset pulses and realizing more highly accurate gradation expression. CONSTITUTION:The input of set pulses SET to the set input terminal S of an RS-FF circuit 25 is suppressed at the time of 0% pulse setting at the time of an RP mode and the input of reset pulses RST to the reset input terminal R of the RS-FF circuit 25 is suppressed at the time of 100% pulse setting at the time of an LP mode. At the time of a CP mode, the reset pulses RST are forcedly inputted to the reset input terminal R of the RS-FF circuit 25 at the beginning of a clock cycle T and the input of the reset pulses RST to the reset input terminal R of the RS-FF circuit 25 is suppressed in a second half at the time of the 100% pulse setting. Thus, the generation of the blank pulses and the offset pulses at the time of the 100% and 0% pulse setting can be prevented and the more highly accurate gradation expression can be performed.
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公开(公告)号：JPH05327434A
公开(公告)日：1993-12-10
申请号：JP15871892
申请日：1992-05-25
Applicant: SONY CORP , SUMITOMO ELECTRIC INDUSTRIES
Inventor： MURAKAMI DAISUKE , MATSUMOTO ISAO , KOBAYASHI KENJI , YOSHIDA HIDEKI , NISHIE MITSUAKI , TAKAHASHI SATOSHI , KAMISAKA KATSUMI
Abstract: PURPOSE:To decrease a signal pass band and to reduce the power consumption of a control means by controlling a delay time of a delay means delaying input data by a prescribed time and outputting the delay time based on a frequency division clock signal being frequency-division of an extracted clock signal. CONSTITUTION:A clock signal recovery section 1 recovers a recovery clock signal S24 by using an amplified signal S2. The recovered clock signal S24 is inputted to a 1/4 frequency divider circuit 25, in which the signal S24 is subject to 1/4 frequency division, and a frequency division clock signal S21 is fed to a difference data generating circuit 23 of a delay time control section 24. The difference data generating circuit 23 gives the frequency division clock signal S21 to an exclusive OR circuit 30 via delay circuits 28, 29 each comprising series connection of delay circuits so that the delay time of the entire delay circuit is equal to a delay time of a delay circuit 26 in the difference data generating circuit 22 receiving the amplified signal S2, with respect to the same control signal. In this case, a subtractor circuit 19 gives a control signal S22 corresponding to a true delay time of the delay circuit 26 to the difference data generating circuits 22, 23.
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Patent Agency Ranking
公开(公告)号：JPH05191238A
公开(公告)日：1993-07-30
申请号：JP2054092
申请日：1992-01-08
Applicant: SONY CORP
Inventor： MURAKAMI DAISUKE , YOSHIDA HIDEKI
Abstract: PURPOSE:To provide the PWM circuit with an excellent linearity in an input level versus pulse width characteristic. CONSTITUTION:A delay clock DOUT which is delayed by a delay time in response to a level of an input analog voltage VIN is obtained by using an A/D converter 4 converting an input analog voltage VIN into a digital voltage, and a delay circuit 9 with an excellent linearity in which the relation between number of stages of delay gates 5, 5... to be passed through and the delay time is proportional to each other. Then an RS flip-flop 12 generates a pulse signal OUT having a pulse width corresponding to the delay time after the clock CK2 is given till the delay clock pour is given.
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公开(公告)号：JP2001060985A
公开(公告)日：2001-03-06
申请号：JP23287899
申请日：1999-08-19
Applicant: SONY CORP
Inventor： YOSHIDA HIDEKI , KAWAGUCHI DAISUKE
Abstract: PROBLEM TO BE SOLVED: To realize the reduction of power consumption and the suppression of unnecessary radiation in communication equipment by controlling the frequency of a clock in accordance of a communication speed. SOLUTION: A clock selection and signal generation circuit 20 outputs a clock selection signal clksel and a clock stopping signal clkstp in accordance with the data accumulation quantity of a transmission/reception buffer 40, and a clock generation circuit 10 controls the frequency of a clock signal clk in accordance with clksel and stops the supply of the clock signal in accordance with clkstp. A signal processing circuit 30 successively writes transmission data corresponding to transmission information from a host to a transmission buffer at the time of answering and reads received data from a reception buffer at the time of reception to reproduce received information. A front end 50 successively reads transmission data from the transmission buffer at the time of transmission to output the data to a transmission line and receives data from a communication line at the time of reception to successively write them in the reception buffer.
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公开(公告)号：JP2000307520A
公开(公告)日：2000-11-02
申请号：JP11853599
申请日：1999-04-26
Applicant: SONY CORP
Inventor： CHOKAI YOICHI , YOSHIDA HIDEKI , MOGI TAKAYUKI , OKAWA YOSHIHIRO
IPC: H04B10/293 , H04B10/07 , H04B10/40 , H04B10/50 , H04B10/564 , H04B10/572 , H04B10/60 , H04B10/14 , H04B10/04 , H04B10/06 , H04B10/26 , H04B10/28
Abstract: PROBLEM TO BE SOLVED: To provide an optical transmitter-receiver that can set a correct transmission luminous quantity by adjusting a timing for mutual transmission luminous quantity switching. SOLUTION: The optical transmitter-receiver is provided with an optical transmission section 14 that transmits an optical signal to an opposite party, an optical reception section 15 that receives an optical signal from the opposite party, a signal level detection means 16a that detects a level of the optical signal received by this optical reception section, and a signal level control means 16d switches a transmission luminous quantity of the optical signal by the transmission section on the basis of the signal level detected by the signal level detection means and also with a delay means 16c that delays the switching of the transmission luminous quantity of the optical signal conducted by the signal level control means.
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公开(公告)号：JPH10271065A
公开(公告)日：1998-10-09
申请号：JP6773397
申请日：1997-03-21
Applicant: SONY CORP
Inventor： YOSHIDA HIDEKI
IPC: H04B10/07 , G02B6/42 , H04B10/035 , H04B10/071 , H04B10/077 , H04B10/2507 , H04B17/00 , H04B10/08
Abstract: PROBLEM TO BE SOLVED: To provide an optical transmitter-receiver with an optical loopback function of a self-completion type. SOLUTION: An optical transmitter-receiver 10 is provided with a laser 11 and a photodetector 13, connected removably to an optical fiber 1 through a proper connection device, a transmission optical signal S11t from the laser is made incident onto the optical fiber and a reception optical signal S1r reached via the optical fiber 1 and a loopback optical signal S11b are made incident onto the photodetector 13. An output signal from the photodetector 13 is fed to a reception circuit 17. While the connection to the optical fiber 1 is released when the optical transmitter-receiver 10A is self-diagnosed, a loopback control circuit 18 generates a drive control signal S18 based on a loopback control signal Sbc and the control signal is fed to a laser drive circuit 16, where an optical output of the laser is increased/decreased.
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公开(公告)号：JP2002354064A
公开(公告)日：2002-12-06
申请号：JP2001160621
申请日：2001-05-29
Applicant: SONY CORP
Inventor： MAEDA SATORU , YOSHIDA HIDEKI , ONISHI MANABU , YAMASHITA TAKASHI , IKEDA KAZUYUKI , KAWAGUCHI DAISUKE , YOSHIKAWA MUNEHIRO
Abstract: PROBLEM TO BE SOLVED: To contrive to be compatible high-speed processing with highly advanced extendibility for communications protocol processing. SOLUTION: Executable communications protocol processing is composed of both of hardware (first/second communications protocol processing parts) and software (first/second control parts) in transmitting/receiving devices that send and receive data in accordance with a fixed communications protocol Thereby, hardware and software can be used properly according to the kinds of data, for instance hardware executes communications protocol processing to process data with heavy processing loads at high speed and software with highly advanced extendibility executes communications protocol processing to process data with light processing loads.
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