21.
    发明专利
    未知

    公开(公告)号:FR2818466A1

    公开(公告)日:2002-06-21

    申请号:FR0016400

    申请日:2000-12-15

    Abstract: The invention concerns a variable-gain differential input and output amplifier comprising an attenuation network (AT1, AT2), receiving an input voltage (V1in-V2in) and supplying on several outputs (O1i, O2i) voltages each of which is equal to the attenuated input voltage; differential transconductance elements (G1i, G2i) each having a first input connected to an output (O1i, O2i) of the attenuation network, and producing first (l ) and second (l +) positive currents and first (1 ) and second (1 ) negative currents, a set of current sources (10) for controlling transconductance of each transconductance element based on an analog control signal (Vcom); and an output block (26) converting the first and second input currents into a differential output voltage (V1out-V2out) and supplying to the second input of each transconductance element a feedback voltage dependent on the output voltage.

    22.
    发明专利
    未知

    公开(公告)号:FR2817408A1

    公开(公告)日:2002-05-31

    申请号:FR0015522

    申请日:2000-11-30

    Abstract: The invention concerns a controllable set of current sources (6') comprising several output terminals (Si), a first transistor (T1i') associated with each first output terminal, the current (li) on each first output terminal depending on the current passing through the first transistor, and control means (8) designed, in response to a predetermined control voltage variation (VAB), to make each first transistor (T1i') gradually conductive then gradually non-conductive, wherein the first transistors are MOS transistors, and wherein each first output terminal (Si) is associated with a current mirror formed by MOS transistors (T2i, T3i), said current mirror supplying to the first output terminal a current dependent on the current passing through the first transistor.

    23.
    发明专利
    未知

    公开(公告)号:DE69709030D1

    公开(公告)日:2002-01-24

    申请号:DE69709030

    申请日:1997-10-24

    Abstract: The voltage regulator has an input terminal (EL) which is connected to a supply voltage (VL). A reference generator circuit (1') delivers a reference voltage (VBG) which is proportional to the required regulated output voltage (VR). An amplifier circuit (2') amplifies the error signal between the reference voltage and the actual output voltage to produce a constant of proportionality. A capacitor (C) is connected across the output of the regulator to sustain the output voltage temporarily and the energy stored in the capacitor is used to temporarily supply the regulator circuit if the supply voltage falls. A comparator (12) delivers an external logic signal if the supply voltage falls.

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