22.
    发明专利
    未知

    公开(公告)号:ITRM20000425A1

    公开(公告)日:2002-01-31

    申请号:ITRM20000425

    申请日:2000-07-31

    Abstract: A method of re-establishing the stability of a sigma-delta modulator having a plurality of integrator stages in cascade and a quantizer, achieving very short resetting times, a bit sequence corresponding to an instability state of the modulator is defined, the bit-stream output by the modulator is monitored to check whether it includes the instability sequence and, if the instability sequence is detected, the last integrator stage is reset and one or more preceding integrator stages are reset, progressively, until the instability sequence is no longer detected.

    26.
    发明专利
    未知

    公开(公告)号:ITTO20010693A1

    公开(公告)日:2003-01-13

    申请号:ITTO20010693

    申请日:2001-07-13

    Abstract: A device for generating synchronous numeric signals, including a first signal generator which supplies a numeric reference signal having a first frequency and a first period; and a second signal generator which generates an internal numeric signal having a second frequency and a second period, and a synchronized numeric signal. In addition, the second signal generator includes a predictor which generates, with a third period and a third frequency higher than the first frequency and the second frequency, estimated samples correlated to a current sample and to a predetermined number of former samples of the internal numeric signal. The predictor, in turn, includes a selection circuit controlled by the first signal generator for selecting one among the estimated samples in each reference period, the synchronized numeric signal being formed by the selected estimated samples.

    28.
    发明专利
    未知

    公开(公告)号:ITTO20010693D0

    公开(公告)日:2001-07-13

    申请号:ITTO20010693

    申请日:2001-07-13

    Abstract: A device for generating synchronous numeric signals, including a first signal generator which supplies a numeric reference signal having a first frequency and a first period; and a second signal generator which generates an internal numeric signal having a second frequency and a second period, and a synchronized numeric signal. In addition, the second signal generator includes a predictor which generates, with a third period and a third frequency higher than the first frequency and the second frequency, estimated samples correlated to a current sample and to a predetermined number of former samples of the internal numeric signal. The predictor, in turn, includes a selection circuit controlled by the first signal generator for selecting one among the estimated samples in each reference period, the synchronized numeric signal being formed by the selected estimated samples.

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