Structure comprising Peltier cells integrated on a semiconductor substrate and corresponding manufacturing process
    21.
    发明公开
    Structure comprising Peltier cells integrated on a semiconductor substrate and corresponding manufacturing process 审中-公开
    结构集成在半导体衬底珀耳帖元件及其制备方法在

    公开(公告)号:EP1840980A1

    公开(公告)日:2007-10-03

    申请号:EP06425225.7

    申请日:2006-03-31

    CPC classification number: H01L35/32

    Abstract: Structure (10) integrated on a semiconductor substrate (11) comprising at least one elementary Peltier cell which comprises:
    a conductive region (15) formed in the semiconductor substrate (11) being less resistive with respect to the semiconductor substrate (11),
    a first semiconductive region (19) projecting from the semiconductor substrate (11) in electric contact with the conductive region (15),
    a second semiconductive region (23) projecting from the semiconductor substrate (11) in electric contact with the conductive region (15) and spaced from the first semiconductive region (19), the first semiconductive region (19) and the second semiconductive region (23) having different type of conductivity.

    Abstract translation: 结构(10)集成在包括至少一个基本珀尔帖电池,它包括一个半导体衬底(11):在所述半导体基板形成的导电区域(15)(11)是相对于所述半导体基片(11)的电阻更小,一 第一半导体区域(19)从与导电区域(15),第二半导电区域(23)电接触的半导体衬底(11)投影在与所述导电区域电接触的半导体衬底(11)投影(15) 并且从所述第一半导体区(19)间隔开,所述第一半导体区域(19)和具有不同的导电类型的第二半导体区(23)。

    Optical radiation emitting device and method for manufacturing this device
    22.
    发明公开
    Optical radiation emitting device and method for manufacturing this device 有权
    设备,用于制备这些设备发射的光辐射,和流程

    公开(公告)号:EP1734591A1

    公开(公告)日:2006-12-20

    申请号:EP05425430.5

    申请日:2005-06-16

    CPC classification number: H01L33/145 H01L33/105 H01L33/465

    Abstract: It is described a device (100) for emitting optical radiation integrated on a substrate (1) of semiconductor material, comprising:
    - an active means layer (10) comprising a main area (30) generating the radiation,
    - a first (7) and second (11) electro-conductive layers for an electric signal generating an electric field to which an exciting current is associated,
    - a dielectric region (8') included between said first (7) and second (11) layers in order to space corresponding peripheral portions of said first (7) and second (11) layers from each other such that the electric field being present in the main area is higher than the one being present between said peripheral portions thus facilitating a corresponding generation of the exciting current in the main area (30).

    Abstract translation: 它描述了一种装置(100),用于发射集成在半导体材料的衬底(1)的光辐射,它包括: - 有源手段层(10),包括一个主区域(30)生成所述辐射,上 - 第一(7) 和第二(11)导电在电场的电信号产生层,以励磁电流中的哪一个相关联, - 一个电介质区(8“)包括在所述第一(7)和第二(11)层,以空间 第一相应的所述的外周部分(7)和从第二海誓山盟(11)层检查那样的电场存在于主区域比一个所述周边部分之间存在从而促进相应生成励磁电流的更高 主区域(30)。

    Sensor with ink-jet printed active film and method for making the sensor
    23.
    发明公开
    Sensor with ink-jet printed active film and method for making the sensor 有权
    传感器电视和电视传感器电影和Verfahren zur Herstellung des Sensors

    公开(公告)号:EP1612547A1

    公开(公告)日:2006-01-04

    申请号:EP04425488.6

    申请日:2004-06-30

    CPC classification number: G01N27/127 C09D11/30 Y10T428/24917

    Abstract: Method for realising a sensor device (20) suitable for detecting the presence of chemical substances and comprising, as detection element, an active film (24) of metallic nanoparticles able to interact with the chemical substances to determine a variation of the global electric conductivity of the film (24). The method comprises the steps of preparing an ink comprising a solution of metallic nanoparticles, and depositing the obtained ink on a supporting substrate (26) by means of ink-jet printing so as to form the active film (24).

    Abstract translation: 用于实现适合于检测化学物质的存在的传感器装置(20)的方法,并且包括能够与化学物质相互作用的金属纳米粒子的活性膜(24)作为检测元件,以确定全局电导率的变化 胶片(24)。 该方法包括以下步骤:制备包含金属纳米颗粒溶液的油墨,并通过喷墨印刷将获得的油墨沉积在支撑基材(26)上以形成活性膜(24)。

    Pressure sensor monolithically integrated and relative process of fabrication
    25.
    发明公开
    Pressure sensor monolithically integrated and relative process of fabrication 审中-公开
    单片集成压力传感器及其制造方法

    公开(公告)号:EP1215476A3

    公开(公告)日:2003-09-17

    申请号:EP01830759.5

    申请日:2001-12-12

    Abstract: Monolithically integrated pressure sensors of outstanding quality and versatility are produced through micromechanical surface structures definition techniques. A microphonic cavity in the semiconductor substrate is monolithically formed by cutting by plasma etching the front side or the back side of the silicon wafer a plurality of trenches or holes deep enough to extend for at least part of its thickness into a purposely made doped buried layer of opposite type of conductivity of the substrate and of the epitaxial layer grown over it; electrochemically etching through such trenches, the silicon of the buried layer with an electrolytic solution suitable for selectively etching the doped silicon of said opposite type of conductivity, making the silicon of the buried layer porous; and oxidizing and leaching away the silicon so made porous. Preferably, the trenches or holes for accessing the doped buried layer are cut through the epitaxial layer and not through the rear of the monocrystalline silicon substrate thus avoiding the burden of precisely aligning the mask on the rear surface with the masks that are used on the front surface of the substrate. Moreover, the thickness of the substrate is normally much greater than that of the epitaxial layer and thus the need to cut relatively deep and narrow trenches requiring the use of special plasma etching equipment is avoided.

    Insulating method and device to obtain an excellent galvanic insulation between two low voltage electronic devices in an integrated opto-isolator
    26.
    发明公开
    Insulating method and device to obtain an excellent galvanic insulation between two low voltage electronic devices in an integrated opto-isolator 有权
    方法和装置用于在intergrierten光隔离器元件的两个低压电路之间具有优异的电隔离

    公开(公告)号:EP1335507A1

    公开(公告)日:2003-08-13

    申请号:EP02425043.3

    申请日:2002-01-31

    CPC classification number: H04B10/801

    Abstract: The invention relates to a method and an isolation device for providing optimum galvanic isolation between two low-voltage electronic devices (A,B), with the devices (A,B) being optically coupled together. The isolation device is essentially an opto-electronic integrated structure comprising a waveguide (17) that is formed between two separate circuit portions integrated in respective regions (13,13') of the same semiconductor substrate.
    Thus, the circuit portions (A,B) are fully galvanically isolated from each other, while the optical signal is transmitted therebetween through an integrated waveguide that is photolithographically patterned in the semiconductor.

    Abstract translation: 本发明涉及一种方法和设备,用于提供最佳的电流隔离两个低电压电子设备(A,B)之间,与所述设备(A,B)光学耦合在一起的隔离。 隔离装置是本质上对光电集成结构,其包括波导(17)那样被集成在同一半导体衬底的respectivement区域(13,13“)两个独立的电路部分之间形成。 因此,电路部(A,B)是完全流电隔离海誓山盟,而光信号是通过对集成波导之间的反式mitted有眼在半导体光刻图案化。

    Reduced thermal process for forming a nanocrystalline silicon layer within a thin oxide layer
    27.
    发明公开
    Reduced thermal process for forming a nanocrystalline silicon layer within a thin oxide layer 审中-公开
    降低的热过程用于在薄氧化层制造的纳米结晶硅层

    公开(公告)号:EP1134799A1

    公开(公告)日:2001-09-19

    申请号:EP00830197.0

    申请日:2000-03-15

    CPC classification number: H01L21/28273 Y10S438/962

    Abstract: A process for forming a thin layer of Silicon nanocrystals in an oxide layer is disclosed. The process comprises, on a semiconductive substrate, thermally oxidizing a first portion of the substrate into an oxide layer, forming Silicon ions within the layer of oxide, and thermally treating the Silicon ions to become the thin layer of Silicon nanocrystals. In the inventive process the formation of the Silicon ions is by ionic implantation of the Silicon ions into the oxide at an ionization energy of between .1 keV and 7keV, and preferably between 1 and 5 keV. This allows the Silicon atoms to coalesce in a lower temperature than would otherwise be possible. Additionally, more than one layer of nanocrystals can be formed by performing more than one implantation at more than one energy level. Embodiments of the invention can be used to form non-volatile memory devices with a very high quality having a very small size.

    Abstract translation: 一种用于形成硅的薄层过程在氧化物层纳米晶体中游离缺失盘。 该方法包括,在半导电衬底,热氧化衬底的第一部分成氧化物层,氧化物层中形成硅离子,以及热处理所述硅离子,成为硅纳米晶体的薄层。 在本发明方法的硅离子的形成是通过将硅离子注入到氧化的离子注入处的0.1千电子伏和7keV之间,并且优选1至5千电子伏电离能。 这使得硅原子结合成一个较低的温度比其他可能的。 此外,纳米晶体的一个以上的层可以通过在多于一个能级执行多于一个的注入来形成。 本发明的实施例可以被用于形成具有非常小的尺寸非常高质量的非易失性存储器装置。

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