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    Method for designing a structure for driving display devices
    22.
    发明公开
    Method for designing a structure for driving display devices 审中-公开
    用于驱动显示设备的设计结构的方法，

    公开(公告)号：EP1583070A1

    公开(公告)日：2005-10-05

    申请号：EP04425227.8

    申请日：2004-03-30

    Applicant: STMicroelectronics S.r.l. ,  Dora S.p.A.

    Inventor： Sala, Leonardo ,  Bagarelli, Fulvio ,  Gariboldi, Roberto

    IPC: G09G3/36 ,  G09G3/20

    CPC classification number: G09G3/3696 ,  G09G3/2011 ,  G09G3/3648 ,  G09G2310/027 ,  G09G2320/0219 ,  G09G2320/0276 ,  G09G2320/0673

    Abstract: Described is a method for designing a structure for driving display devices.
    In one embodiment the method for designing a structure for driving display devices comprises the steps of: considering the transmittance characteristics in relation to the voltage applied to a plurality of liquid crystal displays; defining a transmittance curve on the basis of the voltage applied to said liquid crystals, for each liquid crystal display of said plurality; applying a gamma correction, with different values of the gamma exponent, to each previously defined curve; applying a kickback correction to each previously defined curve; positioning a plurality of branch points along said curves; determining a resisitance value for each branch point and for each of said one curve for each display; choosing the value of minimum resistance for each branch point; choosing the value of maximum resistance per each branch point; calculating the difference between said value of minimum resistance for each branch point and said value of maximum resistance for each branch point; defining for each branch point a value of fixed resistance equal to said value of minimum resistance; defining for each branch point an interval of values for a variable resistance equal to said difference.

    Abstract translation: 的方法创建的显示装置driverby步骤，包括：考虑到在关系的透射率特性的电压施加到多个液晶显示装置; 基于施加到所述显示器，每个显示器的电压的限定透射率曲线; 施加伽马校正，与伽马指数的不同的值，每个透射率曲线; 施加反冲校正每条曲线; 沿着所述曲线定位分支点; 确定性采矿每个分支点和用于为每个显示每条曲线的电阻值; 选择用于每个分支点的最小电阻值; 选择的每个分支点处的最大电阻值; 计算所述最低电阻值和每个分支点所述最大电阻值之间的差; - 定义为每个分支点处的固定电阻值等于所述最小电阻值; - 定义为值的间隔为等于所述差的可变电阻的每个分支点。

    High efficiency 'high side' circuit
    23.
    发明公开
    High efficiency 'high side' circuit 审中-公开
    电压侧电路以高效率

    公开(公告)号：EP1104106A3

    公开(公告)日：2004-01-14

    申请号：EP00204130.9

    申请日：2000-11-21

    Applicant: STMicroelectronics S.r.l.

    Inventor： Novelli, Aldo ,  Gariboldi, Roberto ,  Genova, Angelo ,  Filippo, Roberto

    IPC: H03K17/06

    CPC classification number: H03K17/04123 ,  H03K17/063

    Abstract: A high side circuit is described which comprises at least one power device (1) having a first non drivable terminal (D) connected to a supply voltage (Vcc), at least one load (2) connected between a second non drivable terminal (S) of the power device (1) and ground, and driving circuitry (10). The driving circuitry (10) comprises suitable dimensioned transistors (M1, M2, M3) which are connected to each other and to a higher voltage (Vboot) than the supply voltage (Vcc) in order to control the turning on and the turning off of the power device (1) and to minimize the potential difference between the second non drivable terminal (S) and a drivable terminal (G) of the power device (1) during the turning off state to avoid the re-turning on of the same power device.

    Driving method for flat panel display devices
    24.
    发明公开
    Driving method for flat panel display devices 审中-公开
    AnsteuerverfahrenfürFlachbildschirme

    公开(公告)号：EP1365384A1

    公开(公告)日：2003-11-26

    申请号：EP02425326.2

    申请日：2002-05-23

    Applicant: STMicroelectronics S.r.l. ,  Dora S.p.A.

    Inventor： Sala, Leonardo ,  Domanin, Daniele ,  Gariboldi, Roberto

    IPC: G09G3/36

    CPC classification number: G09G3/3625 ,  G09G3/2018 ,  G09G3/2022 ,  G09G2320/0247 ,  G09G2320/0266

    Abstract: The present invention relates to a driving method for flat panel display devices, particularly a driving method combining a Multi Line Addressing (MLA) technique and a Frame Rate Control (FRC) technique, for flat panel display devices such as Liquid Crystal Display (LCD).
    In an embodiment the method of driving an image display device comprises the following steps: dividing row electrodes of an image device, having a plurality of row electrodes and a plurality of column electrodes, into a plurality of subgroups; selecting one of the plurality of said subgroups having a prefixed number of electrodes; performing a grey scale display by a frame rate control (FRC) by using a prefixed number of frames and a prefixed number of bits representing the grey levels; decomposing one of said frame in a number of time instants proportional to said prefixed number of electrodes; putting the bits representing the grey levels equally distributed in said prefixed number of frames.

    Abstract translation: 本发明涉及用于平板显示装置的驱动方法，特别是组合多行寻址（MLA）技术和帧速率控制（FRC）技术的驱动方法，用于诸如液晶显示器（LCD）的平板显示装置， 。 在一个实施例中，驱动图像显示装置的方法包括以下步骤：将具有多个行电极和多个列电极的图像装置的行电极分成多个子组; 选择所述多个所述子组中的一个具有预定数量的电极; 通过使用预定数量的帧和表示灰度级的前缀位数来执行帧速率控制（FRC）的灰度级显示; 在与所述预定数量的电极成比例的多个时刻中分解所述帧中的一个; 将表示灰度级的位平均分配在所述前缀数目的帧中。

    Protection circuit and method for power transistors, voltage regulator using the same
    26.
    发明公开
    Protection circuit and method for power transistors, voltage regulator using the same 失效
    Schutzschaltung und VerfahrenfürLeistungstransistor sowie diese verwendender Spannungsregler

    公开(公告)号：EP0713163A1

    公开(公告)日：1996-05-22

    申请号：EP94830535.4

    申请日：1994-11-17

    Applicant: CO.RI.M.ME. CONSORZIO PER LA RICERCA SULLA MICROELETTRONICA NEL MEZZOGIORNO ,  SGS-THOMSON MICROELECTRONICS S.r.l.

    Inventor： Colletti, Paolo ,  Bontempo, Gregorio ,  Pulvirenti, Francesco ,  Gariboldi, Roberto

    IPC: G05F1/573

    CPC classification number: G05F1/573

    Abstract: The purpose of the present invention is to supply a method and a circuit simple and accurate enough to protect at least one transistor against exceeding a complex limit implying processing of multiple electrical quantities associated with said transistor.
    Since in many practical cases said complex limit corresponds to the product of at least two quantities, typically a current and a voltage, the circuit in accordance with the present invention generates electrical signals basically proportional to said quantities, multiplies them, compares the product with a reference signal corresponding to the limit placed on the transistor and acts on the transistor in such a way that said limit is not exceeded.
    Advantageously the multiplication of currents can be provided simply by means of connection in series of bipolar transistor junctions at which said currents are supplied to the respective emitters. In this case it is additionally advantageous to generate the reference signal by means of connection in series of the bipolar transistor junctions in such a manner as to have an analogous behaviour of the multiplier and the generator.

    Abstract translation: 本发明的目的是提供足够简单且准确的方法和电路，以保护至少一个晶体管免受超过复数限制，这意味着与所述晶体管相关联的多个电量的处理。 由于在许多实际情况下，所述复数极限对应于至少两个量（通常为电流和电压）的乘积，所以根据本发明的电路产生与所述量基本成比例的电信号，将其乘以它们，将产品与 参考信号对应于放置在晶体管上的极限，并以不超过所述极限的方式作用在晶体管上。 有利地，电流的乘法可以简单地通过串联双极晶体管结的连接来提供，在该点处，所述电流被提供给相应的发射极。 在这种情况下，另外有利的是通过串联双极晶体管结的连接来产生参考信号，使得具有乘法器和发生器的类似行为。

    High efficiency electronic circuit for generating and regulating a supply voltage
    27.
    发明公开
    High efficiency electronic circuit for generating and regulating a supply voltage 有权
    用于产生和调节电源电压的高效率电子电路

    公开(公告)号：EP1184962A1

    公开(公告)日：2002-03-06

    申请号：EP00830586.4

    申请日：2000-08-22

    Applicant: STMicroelectronics S.r.l. ,  TECDIS S.p.A.

    Inventor： Gariboldi, Roberto ,  Lavorerio, Riccardo ,  Sala, Leonardo ,  Nidasio, Giovanni

    IPC: H02M3/07

    CPC classification number: H02M3/073

    Abstract: This invention relates to a high-efficiency electronic circuit (1) for generating and regulating a supply voltage (Vout), comprising a charge-pump voltage multiplier (2) which is associated with an oscillator (3) and has an output connected to a voltage regulator (4) in order to ultimately output said supply voltage (Vout). Advantageously, the circuit comprises a first hysteresis comparator (5) having as inputs the regulator (4) output and the multiplier (2) output, and comprises a second hysteresis comparator (6) having as inputs a reference potential (Vrif) and a partition (K) of the voltage (Vout) presented on the regulator (4) output.
    The comparators are structurally and functionally independent of each other, and their outputs are coupled to the oscillator (3) through a logic circuit (7) to modulate the oscillator (3) operation.

    Abstract translation: 本发明涉及一种用于产生和调节的供给电压（Vout），其包括一个电荷泵电压倍增器的高效率电子电路（1）（2）所有其与在振荡器相关联的（3），并且具有对连接到输出 为了电压调节器（4），以最终所述输出电源电压（Vout）。 有利的是，该电路包括一个第一磁滞比较器（5），其具有作为输入的调节器（4）输出和乘法器（2）输出，和包括第二迟滞比较器（6），其具有作为输入的基准电势（Vrif）和分区 的电压的（K）（VOUT）呈现在调节器（4）输出。 比较器在结构上和功能上独立的海誓山盟，并且它们的输出通过一个逻辑电路（7）来调制所述振荡器（3）操作耦合到所述振荡器（3）。

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