公开(公告)号：US11682622B2

公开(公告)日：2023-06-20

申请号：US17165246

申请日：2021-02-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kyung-Eun Byun ,  Keunwook Shin ,  Yonghoon Kim ,  Hyeonjin Shin ,  Hyunjae Song ,  Changseok Lee ,  Changhyun Kim ,  Yeonchoo Cho

IPC: H01L23/532 ,  H01L21/768 ,  H01L23/522

CPC classification number: H01L23/53276 ,  H01L21/76802 ,  H01L21/76846 ,  H01L21/76849 ,  H01L21/76877 ,  H01L23/5226

Abstract: Provided are an interconnect structure and an electronic device including the interconnect structure. The interconnect structure includes a dielectric layer including at least one trench, a conductive wiring filling an inside of the at least one trench, and a cap layer on at least one surface of the conductive wiring. The cap layer includes nanocrystalline graphene. The nanocrystalline includes nano-sized crystals.

公开(公告)号：US11626282B2

公开(公告)日：2023-04-11

申请号：US16678115

申请日：2019-11-08

Applicant: Samsung Electronics Co., Ltd.

Inventor： Eunkyu Lee ,  Kyung-Eun Byun ,  Hyunjae Song ,  Hyeonjin Shin ,  Changhyun Kim ,  Keunwook Shin ,  Changseok Lee ,  Alum Jung

IPC: H01L21/02 ,  H01L29/16 ,  H01L29/165

Abstract: Provided are a graphene structure and a method of forming the graphene structure. The graphene structure includes a substrate and graphene on a surface of the substrate. Here, a bonding region in which a material of the substrate and carbon of the graphene are covalently bonded is formed between the surface of the substrate and the graphene.

公开(公告)号：US11149346B2

公开(公告)日：2021-10-19

申请号：US16244906

申请日：2019-01-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Changhyun Kim ,  Hyeonjin Shin ,  Kyung-Eun Byun ,  Keunwook Shin ,  Changseok Lee ,  Seunggeol Nam ,  Sungjoo An ,  Janghee Lee ,  Jeonil Lee ,  Yeonchoo Cho

IPC: C23C16/26 ,  C01B32/186 ,  C23C14/02 ,  C23C16/56 ,  C23C14/06

Abstract: Provided are methods of directly growing a carbon material. The method may include a first operation and a second operation. The first operation may include adsorbing carbons onto a substrate by supplying the carbons to the substrate. The second operation may include removing unreacted carbon residues from the substrate after suspending the supplying the carbons of the first operation. The two operations may be repeated until a desired graphene is formed on the substrate. The substrate may be maintained at a temperature less than 700° C. In another embodiment, the method may include forming a carbon layer on a substrate, removing carbons that are not directly adsorbed to the substrate on the carbon layer, and repeating the two operations until desired graphene is formed on the substrate. The forming of the carbon layer includes supplying individual carbons onto the substrate by preparing the individual carbons.

公开(公告)号：US11069619B2

公开(公告)日：2021-07-20

申请号：US16238208

申请日：2019-01-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seunggeol Nam ,  Hyeonjin Shin ,  Keunwook Shin ,  Changhyun Kim ,  Kyung-Eun Byun ,  Hyunjae Song ,  Eunkyu Lee ,  Changseok Lee ,  Alum Jung ,  Yeonchoo Cho

IPC: H01L23/532 ,  H01L23/528 ,  H01L23/522

Abstract: An interconnect structure and an electronic device including the interconnect structure are disclosed. The interconnect structure may include a metal interconnect having a bottom surface and two opposite side surfaces surrounded by a dielectric layer, a graphene layer on the metal interconnect, and a metal bonding layer providing interface adhesion between the metal interconnect and the graphene layer. The metal bonding layer includes a metal material.

公开(公告)号：US20200350256A1

公开(公告)日：2020-11-05

申请号：US16933544

申请日：2020-07-20

Applicant: Samsung Electronics Co., Ltd.

Inventor： Changseok Lee ,  Hyeonjin Shin ,  Seongjun Park ,  Donghyun Im ,  Hyun Park ,  Keunwook Shin ,  Jongmyeong Lee ,  Hanjin Lim

IPC: H01L23/532

Abstract: Example embodiments relate to a wiring structure, a method of forming the same, and an electronic device employing the same. The wiring structure includes a first conductive material layer and a nanocrystalline graphene layer on the first conductive material layer in direct contact with the metal layer.

公开(公告)号：US20200032388A1

公开(公告)日：2020-01-30

申请号：US16244906

申请日：2019-01-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Changhyun Kim ,  Hyeonjin Shin ,  Kyung-Eun Byun ,  Keunwook Shin ,  Changseok Lee ,  Seunggeol Nam ,  Sungjoo An ,  Janghee Lee ,  Jeonil Lee ,  Yeonchoo Cho

IPC: C23C16/26 ,  C01B32/186 ,  C23C14/06 ,  C23C16/56 ,  C23C14/02

Abstract: Provided are methods of directly growing a carbon material. The method may include a first operation and a second operation. The first operation may include adsorbing carbons onto a substrate by supplying the carbons to the substrate. The second operation may include removing unreacted carbon residues from the substrate after suspending the supplying the carbons of the first operation. The two operations may be repeated until a desired graphene is formed on the substrate. The substrate may be maintained at a temperature less than 700° C. In another embodiment, the method may include forming a carbon layer on a substrate, removing carbons that are not directly adsorbed to the substrate on the carbon layer, and repeating the two operations until desired graphene is formed on the substrate. The forming of the carbon layer includes supplying individual carbons onto the substrate by preparing the individual carbons.

公开(公告)号：US12217958B2

公开(公告)日：2025-02-04

申请号：US16807702

申请日：2020-03-03

Applicant: Samsung Electronics Co., Ltd.

Inventor： Keunwook Shin ,  Janghee Lee ,  Seunggeol Nam ,  Hyeonjin Shin ,  Hyunseok Lim ,  Alum Jung ,  Kyung-Eun Byun ,  Jeonil Lee ,  Yeonchoo Cho

IPC: C23C16/02 ,  C23C16/26 ,  H01L21/02

Abstract: A method of pre-treating a substrate on which graphene will be directly formed may include pre-treating the substrate using a pre-treatment gas including at least a carbon source and hydrogen.

公开(公告)号：US12199165B2

公开(公告)日：2025-01-14

申请号：US17670949

申请日：2022-02-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Changhyun Kim ,  Seunggeol Nam ,  Keunwook Shin ,  Dohyun Lee

IPC: H01L29/45 ,  H01L29/06 ,  H01L29/417 ,  H01L29/423 ,  H01L29/78 ,  H01L29/786

Abstract: A semiconductor device includes a first source/drain structure including a first semiconductor region and a first electrode in electrical contact with the first semiconductor region; a second source/drain structure including a second semiconductor region and a second electrode in electrical contact with the second semiconductor region; a channel between the first semiconductor region and the second semiconductor region; and a gate structure including a gate insulating film covering the channel and a gate electrode covering the gate insulating film. The first source/drain structure further includes a silicide film between the first semiconductor region and the first electrode and a conductive barrier between the silicide film and the first electrode. The conductive barrier includes a conductive two-dimensional material.

公开(公告)号：US12183582B2

公开(公告)日：2024-12-31

申请号：US17548997

申请日：2021-12-13

Applicant: Samsung Electronics Co., Ltd.

Inventor： Changseok Lee ,  Sangwon Kim ,  Keunwook Shin

IPC: H01L21/285 ,  H01L29/40

Abstract: A film deposition method may include preparing a non-planar substrate including a first surface, a second surface, and an inclined surface between the first surface and the second surface; depositing a film having a thickness deviation on the first surface, the second surface, and the inclined surface; and etching the film deposited on the first surface, the second surface, and the inclined surface. A height of the second surface may be different than a height of the first surface.

公开(公告)号：US12080595B2

公开(公告)日：2024-09-03

申请号：US17411467

申请日：2021-08-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Keunwook Shin ,  Sanghoon Ahn ,  Woojin Lee ,  Kyung-Eun Byun ,  Junghoo Shin ,  Hyeonjin Shin ,  Yunseong Lee

IPC: H01L21/768 ,  H01L21/285

CPC classification number: H01L21/7685 ,  H01L21/76843 ,  H01L21/76849 ,  H01L21/76855 ,  H01L21/28562

Abstract: Provided is a method of forming an interconnect structure. The method includes preparing a substrate including a first metal layer and a first insulating layer, selectively forming a carbon layer having an sp2 bonding structure on the first metal layer, selectively forming a second insulating layer on the first insulating layer, forming a third insulating layer to cover the second insulating layer, and forming a second metal layer electrically connected to the first metal layer.