公开(公告)号：JP2005535465A

公开(公告)日：2005-11-24

申请号：JP2004529681

申请日：2003-05-06

Applicant: ローベルト ボツシユ ゲゼルシヤフト ミツト ベシユレンクテル ハフツングRobert Bosch Gmbh

Inventor： ベルンハルト ヴィンフリート ,  レルマー フランツ ,  ミュラー ルッツ

IPC: B81C1/00 ,  H01L21/312 ,  H01L21/316

CPC classification number: H01L21/02252 ,  B81B2203/033 ,  B81C1/00571 ,  B81C2201/016 ,  H01L21/02123 ,  H01L21/02238 ,  H01L21/02337 ,  H01L21/02343 ,  H01L21/02359 ,  H01L21/3121 ,  H01L21/31612 ,  Y10S438/958

Abstract: シリコン層（１１）を有する層系が提案されていて、前記シリコン層上に表面的に少なくとも部分的にパッシベーション層（１７）が設けられていて、その際に、前記のパッシベーション層（１７）は、少なくとも十分に無機の第１の部分層（１４）と第２の部分層（１５）とを有し、その際に、前記の第２の部分層（１５）はケイ素を有する有機化合物からなるか又はこの種の材料を含有する。 特に、第２の部分層（１５）はいわゆる「自己組織化単分子層」の形で構築されている。 更に、シリコン層（１１）上にパッシベーション層（１７）を作成する方法が提案されていて、その際に、シリコン層（１１）上に無機の第１の部分層（１４）が作成され、かつ前記の第１の部分層（１４）上に少なくとも部分的に、ケイ素を有する有機化合物を含有するか又は前記の有機化合物からなる第２の部分層（１５）を作成し、これらがパッシベーション層（１７）を形成する。 この提案され層系又は提案された方法は、シリコン中にカンチレバー形の構造を作成する場合に特に適している。

公开(公告)号：KR1020050023273A

公开(公告)日：2005-03-09

申请号：KR1020047019143

申请日：2003-05-14

Applicant: 실리콘 라이트 머신즈 코포레이션

Inventor： 헌터,제임스,에이.

IPC: H01L21/82 ,  H01L21/302

CPC classification number: G02B26/0808 ,  B81B2201/045 ,  B81B2207/015 ,  B81B2207/07 ,  B81C1/00246 ,  B81C2201/016 ,  B81C2203/0735 ,  B81C2203/0778 ,  H01L27/0611

Abstract: 집적 디바이스는 하나 이상의 디바이스 드라이버, 및 상기 하나 이상의 디바이스 드라이버에 모놀리식 결합된 회절 광 변조기를 포함한다. 하나 이상의 드라이버 회로는 수신된 제어 신호를 처리하여, 그 처리된 제어 신호를 회절 광 변조기에 송신하도록 구성된다. 집적 디바이스를 제조하는 방법은, 복수의 트랜지스터 각각의 프론트엔드 부분을 제조하는 단계, 복수의 트랜지스터의 프론트엔드 부분을 고립시키는 단계, 회절 광 변조기의 프론트엔드 부분을 제조하는 단계, 회절 광 변조기의 프론트엔드 부분을 고립시키는 단계, 복수의 트랜지스터에 대한 상호접속부를 제조하는 단계, 회절 광 변조기에 접근하도록 개방 어레이 마스크 및 습식 에칭을 적용하는 단계, 및 회절 광 변조기의 백엔드 부분을 제조하여 회절 광 변조기와 복수의 트랜지스터를 모놀리식 결합하는 단계를 포함하는 것이 바람직하다.

公开(公告)号：KR101035840B1

公开(公告)日：2011-05-20

申请号：KR1020057001619

申请日：2003-05-06

Applicant: 로베르트 보쉬 게엠베하

Inventor： 우르반안드레아 ,  레르머프란츠 ,  브라이트슈베르트클라우스

IPC: B81C1/00

CPC classification number: B81C1/00571 ,  B81B2203/033 ,  B81C2201/016 ,  H01L21/0332

Abstract: 본 발명은 실리콘층(11) 및, 실리콘층 표면 상에 적어도 부분적으로 도포된 패시베이션층(17)을 갖는 층 시스템에 관한 것이며, 상기 패시베이션층(17)은 적어도 광범위하게 무기질인 제 1 부분층(14)과 적어도 광범위하게 폴리머인 제 2 부분층(15)을 포함한다. 또한 실리콘층(11) 상에 패시베이션층(17)을 생성하기 위한 방법이 제시되며, 실리콘층(11) 상에는 제 1 무기질 부분층(14)이 생성되고 그 위에 중간층이, 다시 상기 중간층 위에 제 2 폴리머 부분층(15)이 생성되며 이들은 패시베이션층(17)을 형성한다. 중간층은, 제 1 부분층(14)에 인접한 그 표면 영역이 제 1 부분층(14)과 동일하게 조성되고 제 2 부분층(15)에 인접한 그 표면 영역은 제 2 부분층(15)과 동일하게 조성되며, 또한 상기 중간층의 조성이 제 1 부분층에 상응하는 조성으로부터 제 2 부분층에 상응하는 조성으로 연속적 또는 단계적으로 이어지도록 생성된다. 제시된 층 시스템 또는 방법은 특히 실리콘 내에 자체 지지된 구조물의 생성에 적합하다.

제 1 부분층, 제 2 부분층, 패시베이션층, 중간층, 등방성 에칭, 이방성 에칭

公开(公告)号：WO2016122945A1

公开(公告)日：2016-08-04

申请号：PCT/US2016/014143

申请日：2016-01-20

Applicant: INVENSENSE, INC.

Inventor： SMEYS, Peter ,  SHIN, Jong II ,  SHIN, Jongwoo

IPC: B81B7/00

CPC classification number: B81B7/0041 ,  B81B2207/012 ,  B81B2207/094 ,  B81C1/00293 ,  B81C2201/013 ,  B81C2201/0133 ,  B81C2201/016 ,  B81C2203/035 ,  B81C2203/0792

Abstract: A MEMS device is disclosed. The MEMS device includes a first substrate. At least one structure is formed within the first substrate. The first substrate includes at least one first conductive pad thereon. The MEMS device also includes a second substrate. The second substrate includes a passivation layer. The passivation layer includes a plurality of layers. A top layer of the plurality of layers comprises an outgassing barrier layer. At least one second conductive pad and at least one electrode are coupled to the top layer. At least one first conductive pad is coupled to the at least one second conductive pad.

Abstract translation: 公开了MEMS器件。 MEMS器件包括第一衬底。 在第一基板内形成至少一个结构。 第一衬底包括至少一个第一导电焊盘。 MEMS器件还包括第二衬底。 第二基板包括钝化层。 钝化层包括多个层。 多个层的顶层包括除气阻挡层。 至少一个第二导电焊盘和至少一个电极耦合到顶层。 至少一个第一导电焊盘耦合到所述至少一个第二导电焊盘。

公开(公告)号：WO2014150089A1

公开(公告)日：2014-09-25

申请号：PCT/US2014/022180

申请日：2014-03-08

Applicant: ROBERT BOSCH GMBH ,  FEYH, Ando ,  PURKL, Fabian ,  GRAHAM, Andrew ,  YAMA, Gary

Inventor： FEYH, Ando ,  PURKL, Fabian ,  GRAHAM, Andrew ,  YAMA, Gary

IPC: H01L21/205

CPC classification number: B81C1/00809 ,  B81C2201/016 ,  H01L21/02601 ,  H01L23/3192 ,  H01L45/146 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method of fabricating a passivation layer and a passivation layer for an electronic device. The passivation layer includes at least one passivation film layer and at least one nanoparticle layer. A first film layer is formed of an insulating matrix, such as aluminum oxide (Al 2 O 3 ) and a first layer of a noble metal nanoparticle layer, such as a platinum nanoparticle layer, is deposited on the first film layer. Additional layers are formed of alternating film layers and nanoparticle layers. The resulting passivation layer provides a thin and robust passivation layer of high film quality to protect electronic devices, components, and systems from the disruptive environmental conditions.

Abstract translation: 一种制造电子器件的钝化层和钝化层的方法。 钝化层包括至少一个钝化膜层和至少一个纳米颗粒层。 第一膜层由诸如氧化铝（Al2O3）的绝缘基体形成，并且第一层金属纳米颗粒层（例如铂纳米颗粒层）沉积在第一膜层上。 附加层由交替的膜层和纳米颗粒层形成。 所得到的钝化层提供了一种薄且坚固的高膜质量的钝化层，以保护电子设备，组件和系统免受破坏性环境条件的影响。

公开(公告)号：WO03031319A3

公开(公告)日：2003-10-09

申请号：PCT/DE0203317

申请日：2002-09-06

Applicant: BOSCH GMBH ROBERT ,  MAX PLANCK GESELLSCHAFT ,  FISCHER FRANK ,  RUMP ARNOLD

Inventor： FISCHER FRANK ,  RUMP ARNOLD

IPC: B81B3/00

CPC classification number: B81B3/0008 ,  B81C2201/016

Abstract: The invention concerns micromechanical components (4'; 40) with reduced static friction having in general a size less than 1 mm, devices comprising said components, the manufacture and use of said components, as well as a method for treating the surfaces of micromechanical components (4'; 40). Said method consists in modifying by a surface treatment faulty electronic regions of the semiconductor material used. The inventive components are used for example in acceleration sensors.

Abstract translation: 有adhäsionsverminderte微机械部件（4“; 40）的尺寸通常小于1的Mn，容纳装置，制备和使用这些组件的以及用于治疗微机械装置的表面的方法这样的装置（4”; 40） 提供，其中该方法包括所使用的半导体材料的电子杂质可以通过表面处理来改变的步骤。 这种装置的使用，例如，在加速度传感器。

公开(公告)号：WO0248023A3

公开(公告)日：2003-08-21

申请号：PCT/US0151334

申请日：2001-10-25

Applicant: OMM INC

Inventor： GRITTERS JOHN ,  SAILOR MICHAEL J

IPC: B81C1/00 ,  B81B7/00 ,  B81B3/00

CPC classification number: B81C1/00801 ,  B81C2201/0133 ,  B81C2201/016

Abstract: A method is provided for fabricating a MEMS device on a workpiece by forming a mercaptain mask (306) on a gold structure (309). The mask (306) is used to inhibit anodic etching of polysilicon structures (303) during the acid etch process that is used to remove the oxide dielectric layer from the workpiece to expose the polysilicon structures of the MEMS device (303) to allow their movement. The mercaptain can be utilised to adhere to the exposed gold surface (309) to form a self-mask (306) on the gold surface (309). As such, a workpiece having numerous gold surfaces, such as numerous optomechanical switches, each having various types of gold structures, can be placed in a mercaptain solution. The mercaptain selectively coats the gold surfaces to form self-adhering mercaptain masks on all the exposed gold surfaces.

Abstract translation: 提供了一种通过在金结构（309）上形成巯基掩模（306）来在工件上制造MEMS器件的方法。 掩模（306）用于在酸蚀刻工艺期间抑制多晶硅结构（303）的阳极蚀刻，所述酸蚀刻工艺用于从工件去除氧化物介电层以暴露MEMS器件（303）的多晶硅结构以允许其移动 。 可以使用巯基粘附到暴露的金表面（309）以在金表面（309）上形成自掩模（306）。 因此，可以将具有多个金表面的工件，例如各种具有各种类型的金结构的多个光学机械开关放置在巯基溶液中。 巯基选择性地涂覆金表面以在所有暴露的金表面上形成自粘的巯基掩模。

公开(公告)号：US11965797B1

公开(公告)日：2024-04-23

申请号：US18372687

申请日：2023-09-25

Applicant: Wuxi Sencoch Semiconductor Co., Ltd.

Inventor： Tongqing Liu

IPC: G01L9/06 ,  B81C1/00

CPC classification number: G01L9/065 ,  B81C1/00539 ,  B81C2201/0133 ,  B81C2201/016 ,  B81C2201/0171

Abstract: The present disclosure discloses a bipolar transistor type MEMS pressure sensor and a preparation method thereof. The bipolar transistor type MEMS pressure sensor includes a thin film, a cantilever beam and a bipolar transistor. The bipolar transistor includes a base region, a collector region and an emitter region. The base region is configured to sense deformation of the thin film through a change in resistance value. For the bipolar transistor type MEMS pressure sensor of the disclosure, sensitivity of the sensor can be effectively improved without changing the performance indicators such as the measurement range and nonlinearity. Meanwhile, the bipolar transistor is used as a pressure-sensitive element, so that temperature drift of the sensor can be effectively inhibited.

公开(公告)号：US11681141B2

公开(公告)日：2023-06-20

申请号：US16705677

申请日：2019-12-06

Applicant: STMicroelectronics S.r.l.

Inventor： Roberto Carminati ,  Sonia Costantini ,  Riccardo Gianola ,  Linda Montagna ,  Francesca Maria Carla Carpignano

IPC: G02B26/08 ,  B81B3/00 ,  B81C1/00 ,  G02B26/10

CPC classification number: G02B26/085 ,  B81B3/0045 ,  B81C1/00166 ,  G02B26/101 ,  B81B2201/042 ,  B81B2203/0127 ,  B81B2203/0154 ,  B81B2203/0163 ,  B81B2203/04 ,  B81C2201/016 ,  B81C2201/0188

Abstract: A MEMS device is obtained by forming a temporary biasing structure on a semiconductor body, and forming an actuation coil on the semiconductor body, the actuation coil having at least one first end turn, one second end turn and an intermediate turn arranged between the first and the second end turns and electrically coupled to the first end turn through the temporary biasing structure. In this way, the intermediate turn is biased at approximately the same potential as the first end turn during galvanic growth, and, at the end of growth, the actuation coil has an approximately uniform thickness. At the end of galvanic growth, portions of the temporary biasing structure are selectively removed to electrically separate the first end turn from the intermediate turn and from a dummy biasing region adjacent to the first end turn.

公开(公告)号：US20180257932A1

公开(公告)日：2018-09-13

申请号：US15914092

申请日：2018-03-07

Applicant: Robert Bosch GmbH

Inventor： Benjamin Steuer ,  Christoph Schelling ,  Daniel Pantel ,  Stefan Pinter

IPC: B81C1/00 ,  G02B26/08

CPC classification number: B81C1/00626 ,  B81B7/0067 ,  B81B2201/042 ,  B81C2201/0123 ,  B81C2201/0133 ,  B81C2201/016 ,  B81C2201/053 ,  G02B26/0833

Abstract: A method for manufacturing a micromechanical device includes providing a silicon substrate having a front side and a rear side, where a first normal of the front side deviates by a first angle from the direction of the silicon substrate; forming in the front side first and second trenches that are spaced apart from and essentially parallel to each other, with the first and second trenches extending along a direction of the deviation; forming on the front side a first etching mask that covers the front side except for a first opening area between the first and second trenches; and anisotropically etching the front side using the etching mask, thereby forming in the opening area an oblique surface having a second angle to the first normal, which approximately corresponds to the first angle.