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公开(公告)号：KR100868097B1
公开(公告)日：2008-11-11
申请号：KR1020070057484
申请日：2007-06-12
Applicant: 삼성전자주식회사
IPC: H01L27/112
CPC classification number: H01L27/105 , H01L21/26586 , H01L21/823807 , H01L21/823814 , H01L27/1052 , H01L27/11266 , H01L27/11293
Abstract: The transistor structure of on cell can maintain enough high break down voltage and the low leakage current In the mask ROM device. Data can be steadily outputted because a channel is not formed when the transistor of off-cell is the active state. A mask rom device comprises an on cell and an off cell. The on cell comprises an on cell gate structure having an on cell gate electrode, an on cell gate spacer, an on cell gate insulating layer formed on the substrate, and an on cell junction structure(240a,240b) including a first on cell ion implantation region of the first polarity formed in the substrate, a second on cell ion implantation region, a third on cell ion implantation region of the second polarity, a fourth on cell ion implantation region. The off cell comprises a gate structure including an off-cell gate electrode and an off cell gate spacer and an off cell junction structure including the first on cell ion implantation region and the first polarity, the second off cell ion implantation region and the third on cell ion implantation region and the second polarity.
Abstract translation: 裸电极的晶体管结构可以保持足够的高分断电压和低漏电流。 数据可以稳定地输出，因为离群晶体管是活动状态时不形成通道。 掩模ROM设备包括on单元和off单元。 导通单元包括具有导通单元栅电极，导通单元栅极间隔物，形成在基板上的栅极绝缘层的导通单元栅极结构以及包括第一上电池离子的开孔单元结构（240a，240b） 在衬底中形成的第一极性的注入区域，第二开孔离子注入区域，第二极性的第三细胞离子注入区域，第四细胞离子注入区域。 截止电池包括包括离子电池栅极电极和截止电池栅极间隔物的栅极结构，以及包括第一电池离子注入区域和第一极性的离子电池结结构，第二离子注入区域和第三离子注入区域 细胞离子注入区域和第二极性。
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公开(公告)号：KR1020080028129A
公开(公告)日：2008-03-31
申请号：KR1020060093518
申请日：2006-09-26
Applicant: 삼성전자주식회사
IPC: H01L27/115
CPC classification number: H01L27/2436 , G11C16/02 , H01L27/2463
Abstract: A non-volatile memory device is provided to increase the electron mobility of a channel region by disposing an active region in a direction to increase the electron mobility. An active region(10) is disposed in a substrate(1) having a first surface azimuth in a first lattice direction to increase the electron mobility. A flash memory transistor(30) is formed in the active region in a second lattice direction. The active region is formed in the first lattice direction along the surface azimuth of the substrate, and the flash memory transistor is disposed in the second lattice direction at an angle of 45 degrees to the first lattice direction to increase an effective channel width of a channel region.
Abstract translation: 提供非易失性存储器件以通过在增加电子迁移率的方向上设置有源区来增加沟道区的电子迁移率。 有源区域（10）设置在具有第一晶格方向的第一表面方位的衬底（1）中以增加电子迁移率。 闪存晶体管（30）在第二格子方向的有源区域中形成。 有源区域沿着衬底的表面方位沿第一晶格方向形成，并且闪存晶体管以与第一晶格方向成45度角的第二晶格方向设置，以增加沟道的有效沟道宽度 地区。
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