Abstract:
In the conventional video recording apparatus, a coding quality is simply determined according to a value set through a manipulation of a user. However, the above-described method is not suitable to an application, such as a monitoring camera system, having a high degree of concern for an image only when a moving object exists in the image. To solve such a problem, according to the present invention, after searching a moving object in an image, the coding is performed at a high quality when a moving object exists in an image, and to the contrary, the coding is performed at a low quality when any moving objects do not exist in the image. Thus, the entire quantity of data of the image can be reduced so that efficiency of storing an image is improved and a network bandwidth for transmitting the image can be reduced.
Abstract:
PURPOSE: A method for indexing data sequence and a recording medium recorded with a source program thereof are provided to improve filtering effect and search speed, by selecting a candidate set through distance measurement between query sequence and MBS representing a similar data sequence group. CONSTITUTION: A plurality of data sequence groups grouped in similar data sequences is generated, by clustering data sequences constituted with elements listed in time-series. Minimum bounding sequence constituted with elements corresponding to a minimum value and a maximum value among the elements of the same dimension in the data sequence group is defined as minimum bounding sequence (MBS) representing the data sequence group. The data sequence is indexed on the basis of minimum dynamic time warping (DTW) defined as smallest distance among distances calculated between query sequence and data sequence belonging to the group represented by the MBS.
Abstract:
An IDFT(Interconnect Delay Fault Test) controller and an IDFT device using the same are provided to simultaneously test a delay fault of several interconnect lines using different system clocks or core clocks, through one test cycle correspondingly to each system clock or core clock even if plural system clocks or core clocks exist. IDFT controllers(140,240) generate a control signal for testing an interconnect delay fault between BSCs(Boundary Scan Cells) by using IEEE(Institute of Electrical and Electronics Engineers) 1491.1 standard. The IDFT controller receives a data register shift signal(ShiftDR), a data register update signal(UpdateDR), and a data register clock signal(ClockDR) of IEEE 1491.1 standard and generates an update signal(UpDR) and a capture signal(CapDR) on the basis of a system clock(SysCLK) to perform updating and capturing within one system clock range in the BSC.
Abstract translation:提供IDFT(互连延迟故障测试)控制器和使用该IDFT的IDFT设备,以通过与每个系统时钟或核心时钟对应的一个测试周期来同时测试使用不同系统时钟或核心时钟的多条互连线路的延迟故障,即使 存在多个系统时钟或核心时钟。 IDFT控制器(140,240)通过使用IEEE(Institute of Electrical and Electronics Engineers)1491.1标准生成用于测试BSC(边界扫描单元)之间的互连延迟故障的控制信号。 IDFT控制器接收数据寄存器移位信号(ShiftDR),数据寄存器更新信号(UpdateDR)和IEEE 1491.1标准的数据寄存器时钟信号(ClockDR),并产生更新信号(UpDR)和捕获信号(CapDR) 基于在BSC中的一个系统时钟范围内执行更新和捕获的系统时钟(SysCLK)。
Abstract:
PURPOSE: A high-speed 8bit/10bit encoder/decoder for increasing a data processing speed by applying a two-stage logic synthesis method to a logic gate structure is provided to perform rapidly and stably a processing operation by minimizing processing steps. CONSTITUTION: A 5bit/6bit encoding function block is used for calculating output data of 6 bits having same number of 0 and 1 by using input data of 5 bits. A 3bit/4bit encoding function block is used for calculating output data of 4 bits having same number of 0 and 1 by using input data of 3 bits. A disparity calculation block is used for generating and outputting a disparity(160) in response to an output and a clock of a 8bit/10bit encoding function block.
Abstract:
본 발명은 멀티미디어 데이터의 디코딩에 소요되는 계산량 정보를 메타데이터에 포함시킴으로써 이에 의해 클록 주파수나 버퍼 사이즈와 같은 시스템 리소스를 최적으로 관리할 수 있도록 한 멀티미디어 데이터 디코딩 장치 및 방법에 관한 것이다. 본 발명의 제1 특징에 따르면, 입력되는 멀티미디어 콘텐츠로부터 각 미디어 샘플의 디코딩에 소요되는 계산량 정보가 포함된 메타데이터를 추출하는 메타데이터 추출기; 각 미디어 샘플의 압축을 해제하여 복원하는 미디어 디코더; 상기 미디어 디코더에 제공될 클록 주파수를 조절하는 클록주파수 컨트롤러 및 상기 메타데이터 추출기에 의해 추출된 상기 메타데이터로부터 자기 모델의 계산량 정보를 확인한 후에 각 미디어 샘플에 대해 상기 클록주파수 컨트롤러에 클록주파수 제어 명령을 하달하는 미디어데이터 프로세서를 포함하여 이루어진 멀티미디어 데이터 디코딩 장치가 제공된다. 전술한 제1 특징에 있어서, 상기 계산량 정보는 각 디코딩 단말기 모델별 및 각 미디어 샘플별로 제공되되, 각 미디어 샘플별로 취합되어 제공되거나 각 디코딩 단말기 모델별로 취합되어 제공되는 것을 특징으로 한다. 상기 계산량 정보는 각 미디어 샘플을 디코딩하는데 소요되는 클록 개수 정보인 것을 특징으로 한다.