Protection method and apparatus for computer system

    公开(公告)号:SG44409A1

    公开(公告)日:1997-12-19

    申请号:SG1996000216

    申请日:1990-07-04

    Applicant: IBM

    Abstract: An apparatus and method for protecting BIOS stored on a direct access storage device (62) into a personal computer system (10). The personal computer system (JO) comprises a system processor (26), a system planar (24), a random access main memory (32), a read only memory (36), a protection means and at least one direct access storage device (62). The read only memory (36) includes a first portion of BIOS and data representing the type of system processor (26) and system planar (24) I/O configuration. The first portion of BIOS initializes the system (10) and the direct access storage device (62), and resets the protection means in order to read in a master boot record into the random access memory (32) from a protectable partition on the direct access storage device (62). The master boot record includes a data segment and an executable code segment. The data segment includes data representing system hardware and a system configuration which is supported by the master boot record. The first BIOS portion confirms the master boot record is compatible with the system hardware by verifying that the data from the data segment of the master boot record agrees with the system processor (26), system planar (24), and planar (24) I/O configuration. If the master boot record is compatible with the system hardware, the first BIOS portion vectors the system processor (26) to execute the executable code segment of the master boot record. The executable code segment confirms that the system configuration has not changed and loads in the remaining BIOS portion from the same protectable partition on the direct access storage device (62) into random access memory (32). The executable code segment then verifies the authenticity of the remaining BIOS portion and vectors the system processor (26) to begin executing the BIOS now in random access memory. BIOS, executing in random access memory (32), then activates the protection means to prevent further access to the protectable partition. BIOS boots up the operating system to begin operation of the personal computer system.

    33.
    发明专利
    未知

    公开(公告)号:DE69024111T2

    公开(公告)日:1996-06-20

    申请号:DE69024111

    申请日:1990-06-11

    Applicant: IBM

    Abstract: Apparatus for assigning addresses to devices connected to an SCSI bus (10). A second configure bus (15) interconnects address assignable devices on the SCSI bus. The assignable devices may be used in a mixed system where some devices have fixed non-assignable addresses. The master device in the SCSI bus transmits configuration commands over the configuration bus and addresses for assignment over the SCSI bus. Acknowledgements are received back from a device which has accepted an address. Once configured with an address, the device propagates subsequent configuration commands to an adjacent device.

    METHOD OF HANDLING DISK SECTOR ERRORS IN DASD CACHE

    公开(公告)号:GB2202976B

    公开(公告)日:1991-10-09

    申请号:GB8728923

    申请日:1987-12-10

    Applicant: IBM

    Abstract: In a DASD caching system, in which pages of sectors of data are stored by reading in a desired sector and prefetching a plurality of adjacent sectors for later access, errors in disk storage media cause error signals to be generated. Such errors are handled by storing indications of which sectors have errors and which do not, and accessing such indications in response to later requests for such sectors. Such indications are stored in each page in the cache. Further, a history is maintained of which pages and sectors therein, were placed in the cache in the past.

    AN APPARATUS AND METHOD FOR PREVENTING UNAUTHORIZED ACCESS TO BIOS IN PERSONAL COMPUTER SYSTEM

    公开(公告)号:AU5999390A

    公开(公告)日:1991-02-28

    申请号:AU5999390

    申请日:1990-07-30

    Applicant: IBM

    Abstract: An apparatus and method for protecting BIOS stored on a direct access storage device (62) into a personal computer system (10). The personal computer system (JO) comprises a system processor (26), a system planar (24), a random access main memory (32), a read only memory (36), a protection means and at least one direct access storage device (62). The read only memory (36) includes a first portion of BIOS and data representing the type of system processor (26) and system planar (24) I/O configuration. The first portion of BIOS initializes the system (10) and the direct access storage device (62), and resets the protection means in order to read in a master boot record into the random access memory (32) from a protectable partition on the direct access storage device (62). The master boot record includes a data segment and an executable code segment. The data segment includes data representing system hardware and a system configuration which is supported by the master boot record. The first BIOS portion confirms the master boot record is compatible with the system hardware by verifying that the data from the data segment of the master boot record agrees with the system processor (26), system planar (24), and planar (24) I/O configuration. If the master boot record is compatible with the system hardware, the first BIOS portion vectors the system processor (26) to execute the executable code segment of the master boot record. The executable code segment confirms that the system configuration has not changed and loads in the remaining BIOS portion from the same protectable partition on the direct access storage device (62) into random access memory (32). The executable code segment then verifies the authenticity of the remaining BIOS portion and vectors the system processor (26) to begin executing the BIOS now in random access memory. BIOS, executing in random access memory (32), then activates the protection means to prevent further access to the protectable partition. BIOS boots up the operating system to begin operation of the personal computer system.

    36.
    发明专利
    未知

    公开(公告)号:FR2613506B1

    公开(公告)日:1990-02-09

    申请号:FR8717531

    申请日:1987-12-09

    Applicant: IBM

    Abstract: In a DASD caching system, in which pages of sectors of data are stored by reading in a desired sector and prefetching a plurality of adjacent sectors for later access, errors in disk storage media cause error signals to be generated. Such errors are handled by storing indications of which sectors have errors and which do not, and accessing such indications in response to later requests for such sectors. Such indications are stored in each page in the cache. Further, a history is maintained of which pages and sectors therein, were placed in the cache in the past.

    37.
    发明专利
    未知

    公开(公告)号:IT8819949D0

    公开(公告)日:1988-03-25

    申请号:IT1994988

    申请日:1988-03-25

    Applicant: IBM

    Abstract: In a DASD caching system, in which pages of sectors of data are stored by reading in a desired sector and prefetching a plurality of adjacent sectors for later access, errors in disk storage media cause error signals to be generated. Such errors are handled by storing indications of which sectors have errors and which do not, and accessing such indications in response to later requests for such sectors. Such indications are stored in each page in the cache. Further, a history is maintained of which pages and sectors therein, were placed in the cache in the past.

    38.
    发明专利
    未知

    公开(公告)号:CH621008A5

    公开(公告)日:1980-12-31

    申请号:CH508477

    申请日:1977-04-25

    Applicant: IBM

    Abstract: Signals generated by double frequency magnetic recording are received by logic which is controlled, and sensed, by a sequence of program instructions from a microprocessor. In particular, a special pattern of signals is to be recognized. The special pattern of signals is known in the magnetic disc recording art as an address mark which is a unique pattern of interspersed clock signals and data signals. The pattern is made more unique from any other pattern of data by the fact that certain of the clock signals are missing. The ability to utilize a microprocessor, which is relatively slow, in a magnetic recording system in which the bit rate is relatively fast, is enhanced by a particular processor program instruction which is effective to access a next following instruction from program storage and then stop the clock of the processor. The clock is re-started, and therefore execution of the next instruction initiated, upon receipt of a timing signal from the logic receiving the signals to be detected.

    MICROPROCESSOR SIGNAL DETECTOR
    39.
    发明专利

    公开(公告)号:AU2475377A

    公开(公告)日:1978-11-09

    申请号:AU2475377

    申请日:1977-05-02

    Applicant: IBM

    Abstract: Signals generated by double frequency magnetic recording are received by logic which is controlled, and sensed, by a sequence of program instructions from a microprocessor. In particular, a special pattern of signals is to be recognized. The special pattern of signals is known in the magnetic disc recording art as an address mark which is a unique pattern of interspersed clock signals and data signals. The pattern is made more unique from any other pattern of data by the fact that certain of the clock signals are missing. The ability to utilize a microprocessor, which is relatively slow, in a magnetic recording system in which the bit rate is relatively fast, is enhanced by a particular processor program instruction which is effective to access a next following instruction from program storage and then stop the clock of the processor. The clock is re-started, and therefore execution of the next instruction initiated, upon receipt of a timing signal from the logic receiving the signals to be detected.

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