31.
    发明专利
    未知

    公开(公告)号:DE2546314A1

    公开(公告)日:1976-05-13

    申请号:DE2546314

    申请日:1975-10-16

    Applicant: IBM

    Abstract: An improved FET structure and method of making same is disclosed. The gate structure of the FET includes a phospho-silicate glass as the insulator and polysilicon as the gate conductor. A thin layer of silicon nitride is formed over the polysilicon and selectively etched so as to remain only over gate areas and other areas where it is desired to extend the polysilicon as a conductor. The unmasked polysilicon is oxidized to form the thick oxide surface coating. The disclosure also describes the use of oxide rings and epitaxial layers to reduce parasitic effects between adjacent FET devices in an integrated circuit.

    TWO DEVICE MONOLITHIC BIPOLAR MEMORY ARRAY

    公开(公告)号:CA954220A

    公开(公告)日:1974-09-03

    申请号:CA127432

    申请日:1971-11-12

    Applicant: IBM

    Abstract: This specification discloses a stored charge storage cell for monolithic memories. The cell comprises a device akin to a silicon-controlled rectifier and can be schematically illustrated as an NPN and a PNP transistor connected together in what is commonly called a hook circuit. A fixed potential is applied to the semiconductor zone of the device not commonly used as a terminal for a silicon-controlled rectifier so that the cell is prevented from latching as a silicon-controlled rectifier or hook circuit would normally latch. The charge on the capacitance of collector-base PN junctions of the NPN and PNP transistors is then controlled to store data in the cell.

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