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公开(公告)号:US20180068939A1
公开(公告)日:2018-03-08
申请号:US15677835
申请日:2017-08-15
Applicant: Intel IP Corporation
Inventor: Klaus Reingruber , Sven Albers , Christian Geissler
IPC: H01L23/498 , H01L21/48
Abstract: Embodiments herein may relate to a package with a dielectric layer having a first face and a second face opposite the first face. A conductive line of a patterned metal redistribution layer (RDL) may be coupled with the second face of the dielectric layer. The line may include a first portion with a first width and a second portion directly coupled to the first portion, the second portion having a second width. The first portion may extend beyond a plane of the second face of the dielectric layer, and the second portion may be positioned between the first face and the second face of the dielectric layer. Other embodiments may be described and/or claimed.
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公开(公告)号:US09818672B2
公开(公告)日:2017-11-14
申请号:US14181325
申请日:2014-02-14
Applicant: INTEL IP CORPORATION
Inventor: Michael P. Skinner , Sven Albers , Harald Gossner , Peter Baumgartner , Hans-Joachim Barth
IPC: H01L23/467 , H01L23/473
CPC classification number: H01L23/467 , H01L23/473 , H01L2224/0401 , H01L2224/0557 , H01L2224/06181 , H01L2224/16145 , H01L2224/16146 , H01L2224/16225 , H01L2224/1703 , H01L2224/17181 , H01L2224/32225 , H01L2224/73204 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2225/06565 , H01L2225/06589 , H01L2225/1035 , H01L2225/1058 , H01L2225/1094 , H01L2924/15311 , H01L2924/00
Abstract: Embodiments of flow diversion devices (FDDs) are disclosed herein. An FDD may include a body formed of a body material and a plurality of thermally deformable fins arranged along the body. Individual fins of the plurality of fins may include first and second materials having different coefficients of thermal expansion (CTEs). Other embodiments may be disclosed and/or claimed.
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公开(公告)号:US20170285280A1
公开(公告)日:2017-10-05
申请号:US15089524
申请日:2016-04-02
Applicant: Intel IP Corporation
Inventor: Georg Seidemann , Christian Geissler , Sven Albers , Thomas Wagner , Marc Dittes , Klaus Reingruber , Andreas Wolter , Richard Patten
CPC classification number: G02B6/428 , G02B6/12002 , G02B6/122 , G02B6/1221 , G02B6/132 , G02B6/30 , G02B6/4232 , G02B6/4238 , G02B6/43 , G02B2006/12197
Abstract: Disclosed is a package comprising a substrate having a patterned surface with an optical contact area, an optical redistribution layer (oRDL) feature, and a build-up material extending over the patterned surface of the substrate and around portions of the oRDL features. In some embodiments, the package comprises a liner sheathing the oRDL features. In some embodiments, the oRDL feature extends through openings in an outer surface of the build-up material and forms posts extending outward from the outer surface. In some embodiments, the package comprises an electrical redistribution layer (eRDL) feature, at least some portion of which overlap at least some portion of the oRDL feature. In some embodiments, the package comprises an optical fiber coupled to the oRDL features.
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公开(公告)号:US09209143B2
公开(公告)日:2015-12-08
申请号:US14038248
申请日:2013-09-26
Applicant: Intel IP Corporation
Inventor: Georg Seidemann , Sven Albers , Teodora Ossiander , Michael Skinner , Hans-Joachim Barth , Harald Gossner , Reinhard Mahnkopf , Christian Mueller , Wolfgang Molzer
CPC classification number: H01L24/09 , H01L24/03 , H01L24/05 , H01L24/06 , H01L24/08 , H01L24/13 , H01L24/16 , H01L24/48 , H01L24/80 , H01L24/81 , H01L25/0655 , H01L25/50 , H01L2224/03444 , H01L2224/0346 , H01L2224/03602 , H01L2224/0401 , H01L2224/04042 , H01L2224/05009 , H01L2224/05013 , H01L2224/05014 , H01L2224/05015 , H01L2224/05016 , H01L2224/05553 , H01L2224/05556 , H01L2224/05571 , H01L2224/05573 , H01L2224/0558 , H01L2224/05644 , H01L2224/05655 , H01L2224/05664 , H01L2224/06135 , H01L2224/06155 , H01L2224/06183 , H01L2224/08054 , H01L2224/08056 , H01L2224/08057 , H01L2224/08121 , H01L2224/08137 , H01L2224/08225 , H01L2224/09135 , H01L2224/09183 , H01L2224/1134 , H01L2224/131 , H01L2224/16137 , H01L2224/48137 , H01L2224/80201 , H01L2224/80895 , H01L2224/81203 , H01L2224/94 , H01L2924/00014 , H01L2924/1434 , H01L2224/03 , H01L2924/014 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
Abstract: An apparatus comprises a first integrated circuit (IC) die that includes a top layer, a bottom surface, a sidewall surface extending from a top surface of the top layer to the bottom surface, and at least one multi-surface contact pad, a second IC die including a top layer, a bottom surface, a sidewall surface extending from a top surface of the top layer to the bottom surface, and at least one multi-surface contact pad, wherein the second IC die is arranged adjacent to the first IC die, and includes an electrically conductive bond in contact with at least one of the top surface or the side surface of the multi-surface contact pad of the first IC die and the top surface of the multi-surface contact pad of the second IC die.
Abstract translation: 一种装置包括第一集成电路(IC)芯片,其包括顶层,底表面,从顶层的顶表面延伸到底表面的侧壁表面,以及至少一个多表面接触垫,第二 IC芯片包括顶层,底面,从顶层的顶表面延伸到底表面的侧壁表面,以及至少一个多表面接触焊盘,其中第二IC管芯被布置为与第一IC 并且包括与第一IC管芯的多表面接触焊盘的顶表面或侧表面中的至少一个与第二IC管芯的多表面接触焊盘的顶表面接触的导电接合 。
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