公开(公告)号：EP0893009A4

公开(公告)日：2000-08-09

申请号：EP97954534

申请日：1997-12-16

Applicant: MICROCHIP TECH INC

Inventor： CHIAO JENNIFER YUAN ,  YACH RANDY L

IPC: H03L7/093 ,  H03L7/089 ,  H03L7/10 ,  H03L7/12 ,  H03D3/24 ,  H03L7/00

CPC classification number: H03L7/12 ,  H03L7/0891

Abstract: A phase locked loop (PPL) circuit is used to synchronize a local clock frequency with an edge of a reference clock frequency, employing a phase detector (30) to compare the local clock frequency and the reference clock frequency to generate a control signal indicative of the need to increase or to decrease the local clock frequency for phase locking thereof to the reference clock frequency. A voltage controlled oscillator (VCO) (35) is responsive to a signal voltage derived from the control signal to vary the local clock frequency as necessary to achieve phase locking. A loop filter (32) has a reference voltage threshold level which is preprogrammable to enable the loop filter to respond to the control signal by adjusting the signal voltage as a virtual step function toward the programmed reference voltage threshold level before application to the VCO (35), and then cycling up and down in search for a stable control signal voltage to reduce the time necessary to achieve the desired phase locking.

公开(公告)号：EP0787379A4

公开(公告)日：1999-08-25

申请号：EP96924422

申请日：1996-07-17

Applicant: MICROCHIP TECH INC

Inventor： YACH RANDY L ,  HULL RICHARD L

IPC: G11C5/14 ,  H02H3/24 ,  H02J1/00 ,  H03K17/14 ,  H03K17/22

CPC classification number: H03K17/223 ,  G11C5/143 ,  H02H3/243 ,  H03K17/145 ,  H03K17/22

Abstract: A power-on reset circuit (10) for resetting electronic circuitry to be monitored has been provided. The power-on reset circuit includes a trip point generator (12) including the worst case component (the component that requires the greatest power supply voltage to operate) within the electronic circuitry for setting the threshold voltatge for taking the electronic circuitry out of reset such that if the worst case component is operative, it is guaranteed that all components are operative and, thus, the electronic circuitry can be taken out of reset. Moreover, because the threshold voltage is based upon the worst case component of the electronic circuitry, the threshold voltage of the trip point generator will adequately track the electronic circuitry over normal process and temperature variations. Additionally, the power-on reset circuit includes a noise filter (34) for placing the electronic circuitry back into reset if variations within the power supply voltage cause the power supply voltage level to fall below a predetermined threshold for at least a minimum period of time.

公开(公告)号：EP0864154A4

公开(公告)日：2000-06-14

申请号：EP97943474

申请日：1997-09-25

Applicant: MICROCHIP TECH INC

Inventor： HULL RICHARD L ,  YACH RANDY L

IPC: G11C16/06 ,  G11C16/26 ,  G11C16/08

CPC classification number: G11C16/26

Abstract: A method of high speed reading of data from an EPROM, in which a memory array (12) is programmed based on device status at intersections of rows and columns of the array to store data therein as 0's and 1's, uses a capacitive overcharging and discharging technique to enable fast voltage stabilization without drawing significant current. A row containing memory element (25) to be read is quickly overdriven to overcharge an effective capacitance associated with the row to substantially the maximum level of the EPROM supply voltage (Vdd) which may exceed the programmed threshold voltage of the selected memory element (25). The effective capacitance is thereupon discharged to voltage level below both the maximum level of the supply voltage (Vdd) and the programmed threshold. Then the status and data content of the selected memory element (25) are read by first grounding an electrode of a source-drain path of the transistor comprising the memory element (25) to cause current with substantially no DC component to flow through that path of the transistor. A sense amplifier (17) in source-drain path of the transistor is triggered to detect current flow therethrough as indicative of the data content of the memory element (25).

公开(公告)号：EP0746817A4

公开(公告)日：1996-03-13

申请号：EP92924262

申请日：1992-11-12

Applicant: MICROCHIP TECH INC

Inventor： YACH RANDY L ,  MITRA SUMIT

IPC: G06F1/04 ,  G06F1/24 ,  G06F11/267 ,  G06F15/78 ,  G06F11/00 ,  G06F1/00 ,  G06F9/00 ,  H03K17/22 ,  H03K17/28

CPC classification number: G06F1/24 ,  G06F11/221

Abstract: A microcontroller (10) is adapted, when operating, to execute programs and instructions and, in response, to generate control signals to selectively control external apparatus. The microcontroller (10) includes a power supply (70, 85) for supplying power to the overall device within a predetermined range suitable for its operation, and a clock for supplying a clock frequency to the microcontroller with a stability suitable for precise timing and counting within the device. The microcontroller (10) is selectively reset to prevent it from executing programs and instructions for purposes of generating the control signals, and is maintained in the reset condition despite initiation of a removal from the reset condition, until the power supplied by the power supply (70, 85) is in a predetermined range and the clock frequency supplied by the clock is stable.

Abstract translation: 微控制器在操作时适于执行程序和指令，并且作为响应，适于产生控制信号以选择性地控制外部设备。 微控制器包括用于在适于其操作的预定范围内向总体设备供电的电源，以及用于以适于在设备内精确定时和计数的稳定性向微控制器提供时钟频率的时钟。 微控制器被选择性地复位以防止它为了产生控制信号而执行程序和指令，并且尽管开始从复位状态移除直到电源提供的电源处于预定的状态 时钟提供的时钟频率稳定。 以这种方式，在实现器件稳定性之前，不允许微控制器的执行，以防止执行中的错误。 在所公开的实施例中，复位条件由上电定时器和振荡器启动定时器维持，每个定时器具有可编程的超时间隔，以仅在两个定时器的超时间隔已经到期时才结束复位条件。