公开(公告)号：WO2010035035A3

公开(公告)日：2010-08-26

申请号：PCT/GB2009051246

申请日：2009-09-24

Applicant: CAMBRIDGE ENTPR LTD ,  SCOTT JAMES FLOYD ,  FAN HONGJIN

Inventor： SCOTT JAMES FLOYD ,  FAN HONGJIN

IPC: B81B7/04

CPC classification number: B81B7/04 ,  A61B5/0059 ,  B41J2/1429 ,  B81B2201/052 ,  B81B2201/06 ,  G01J3/10 ,  G01J3/42 ,  G01N21/3581

Abstract: An array of microtubes upwardly extending from a supporting base of substrate material is provided, in which the tubes comprise at least one concentric layer comprising a metallic oxide and at least one concentric layer comprising a piezoelectric and/or ferroelectric material. The array is made by lining the walls of pores in the substrate material sequentially with metallic oxide and piezoelectric and/or ferroelectric material and then removing part but not all of the substrate material. The arrays may be used in a variety of applications including liquid delivery and as microelectronic components. A method of generating terahertz emission is also provided.

Abstract translation: 提供从衬底材料的支撑基底向上延伸的微管阵列，其中管包括包含金属氧化物的至少一个同心层和包括压电和/或铁电材料的至少一个同心层。 该阵列通过依次用金属氧化物和压电和/或铁电材料衬在基底材料中的孔壁，然后除去部分而不是全部基底材料制成。 阵列可以用于各种应用，包括液体输送和微电子部件。 还提供了一种产生太赫兹发射的方法。

公开(公告)号：WO2006037151A2

公开(公告)日：2006-04-13

申请号：PCT/AU2005001438

申请日：2005-10-04

Applicant: SILVERBROOK RES PTY LTD ,  MCREYNOLDS DARRELL LARUE ,  SILVERBROOK KIA

Inventor： MCREYNOLDS DARRELL LARUE ,  SILVERBROOK KIA

CPC classification number: H01L21/02057 ,  B41J2/1412 ,  B41J2/1601 ,  B41J2/1623 ,  B41J2/1628 ,  B41J2/1631 ,  B41J2/164 ,  B81B2201/052 ,  B81B2203/033 ,  B81C1/00849 ,  B81C2201/0112 ,  B81C2201/0132

Abstract: A method of removing a polymeric coating from sidewalls of an etched trench defined in a silicon wafer is provided. The method comprises etching the wafer in a biased plasma etching chamber using an O2 plasma. The chamber temperature is in the range of 90 to 180 °C.

Abstract translation: 提供从硅晶片中限定的蚀刻沟槽的侧壁去除聚合物涂层的方法。 该方法包括使用O 2等离子体在偏压等离子体蚀刻室中蚀刻晶片。 室温度在90至180℃的范围内。

公开(公告)号：WO2016131657A1

公开(公告)日：2016-08-25

申请号：PCT/EP2016/052318

申请日：2016-02-03

Applicant: MEMJET TECHNOLOGY LIMITED

Inventor： NORTH, Angus ,  O'REILLY, Ronan ,  MCAVOY, Gregory

IPC: B41J2/16 ,  B81C1/00

CPC classification number: B81C1/00611 ,  B41J2/1603 ,  B41J2/1628 ,  B41J2/1631 ,  B41J2/1639 ,  B41J2/1645 ,  B81B2201/052 ,  B81B2203/0353 ,  B81C2201/0104 ,  B81C2201/0121

Abstract: A process for filling one or more etched holes defined in a frontside surface of a wafer substrate. The process includes the steps of: (i) depositing a layer of a thermoplastic first polymer onto the frontside surface and into each hole; (ii) reflowing the first polymer; (iii) exposing the wafer substrate to a controlled oxidative plasma; (iv) optionally repeating steps (i) to (iii); (v) depositing a layer of a photoimageable second polymer; (vi) selectively removing the second polymer from regions outside a periphery of the holes using exposure and development; and (vii) planarizing the frontside surface to provide holes filled with a plug comprising the first and second polymers, which are different than each other. Each plug has a respective upper surface coplanar with the frontside surface.

Abstract translation: 一种用于填充限定在晶片衬底的前表面中的一个或多个蚀刻孔的工艺。 该方法包括以下步骤：（i）将热塑性第一聚合物层沉积到前表面和每个孔中; （ii）回流第一聚合物; （iii）将晶片衬底暴露于受控氧化等离子体; （iv）任选地重复步骤（i）至（iii）; （v）沉积可光成像的第二聚合物层; （vi）使用曝光和显影从所述孔的外周边区域选择性地除去所述第二聚合物; 和（vii）平面化前侧表面以提供填充有彼此不同的第一和第二聚合物的塞子的孔。 每个插头具有与前侧表面共面的相应的上表面。

公开(公告)号：WO2011022749A1

公开(公告)日：2011-03-03

申请号：PCT/AU2009/001088

申请日：2009-08-25

Applicant: SILVERBROOK RESEARCH PTY LTD ,  FU, Yao ,  TSAI, Yi-Wen ,  MCREYNOLDS, Darrell LaRue ,  SECKER, David ,  BORDELANNE, Valerie ,  WISZNIEWSKI, Witold

Inventor： FU, Yao ,  TSAI, Yi-Wen ,  MCREYNOLDS, Darrell LaRue ,  SECKER, David ,  BORDELANNE, Valerie ,  WISZNIEWSKI, Witold

IPC: H01L21/311 ,  B41J2/16 ,  G03F7/42

CPC classification number: B41J2/16 ,  B41J2/14137 ,  B41J2/1628 ,  B41J2/1629 ,  B41J2/1631 ,  B41J2/1642 ,  B81B2201/052 ,  B81C1/00476 ,  G03F7/427 ,  H01L21/31138

Abstract: A method of photoresist removal with concomitant de-veiling is provided. The method employs a plasma formed from a gas chemistry comprising O 2 , NH 3 and a fluorine-containing gas, such as CF 4 . The method is particularly suitable for use in MEMS fabrication processes, such as inkjet printhead fabrication.

Abstract translation: 提供了一种同时进行光刻胶去除的方法。 该方法采用由包含O 2，NH 3和含氟气体如CF 4的气体化学物质形成的等离子体。 该方法特别适用于MEMS制造工艺，例如喷墨打印头制造。

公开(公告)号：WO2010035035A2

公开(公告)日：2010-04-01

申请号：PCT/GB2009/051246

申请日：2009-09-24

Applicant: CAMBRIDGE ENTERPRISE LIMITED ,  SCOTT, James Floyd ,  FAN, Hongjin

Inventor： SCOTT, James Floyd ,  FAN, Hongjin

IPC: B81B1/00

CPC classification number: B81B7/04 ,  A61B5/0059 ,  B41J2/1429 ,  B81B2201/052 ,  B81B2201/06 ,  G01J3/10 ,  G01J3/42 ,  G01N21/3581

Abstract: An array of microtubes upwardly extending from a supporting base of substrate material is provided, in which the tubes comprise at least one concentric layer comprising a metallic oxide and at least one concentric layer comprising a piezoelectric and/or ferroelectric material. The array is made by lining the walls of pores in the substrate material sequentially with metallic oxide and piezoelectric and/or ferroelectric material and then removing part but not all of the substrate material. The arrays may be used in a variety of applications including liquid delivery and as microelectronic components. A method of generating terahertz emission is also provided.

Abstract translation: 提供了从基底材料的支撑基底向上延伸的微管的阵列，其中管包括至少一个包含金属氧化物的同心层和至少一个包含压电和/或 铁电材料。 该阵列通过用金属氧化物和压电和/或铁电材料依次衬底衬底材料中的孔的壁，然后除去部分衬底材料而非全部衬底材料而制成。 阵列可用于各种应用，包括液体输送和微电子元件。 还提供了产生太赫兹辐射的方法。

公开(公告)号：WO2009018304A3

公开(公告)日：2009-04-16

申请号：PCT/US2008071533

申请日：2008-07-30

Applicant: HEWLETT PACKARD DEVELOPMENT CO ,  BHOWMIK SIDDHARTHA ,  KELLY STEVEN E

Inventor： BHOWMIK SIDDHARTHA ,  KELLY STEVEN E

IPC: B41J2/05 ,  B81B7/04

CPC classification number: B81B3/0072 ,  B41J2/1601 ,  B41J2/1628 ,  B41J2/1629 ,  B41J2/1642 ,  B81B2201/052

Abstract: The present invention provides a semiconductor device for a thermal inkjet (TIJ) device or a micro-electromechanical systems (MEMS) device. The device comprises a silicon wafer substrate having a front side and a back side, and a silicon nitride layer on the back side of the silicon wafer substrate.

Abstract translation: 本发明提供了一种用于热喷墨（TIJ）器件或微机电系统（MEMS）器件的半导体器件。 该装置包括具有正面和背面的硅晶片衬底，以及在硅晶片衬底的背面上的氮化硅层。

公开(公告)号：EP3259134B1

公开(公告)日：2018-08-08

申请号：EP16702736.6

申请日：2016-02-03

Applicant: Memjet Technology Limited

Inventor： NORTH, Angus ,  O'REILLY, Ronan ,  MCAVOY, Gregory

IPC: B41J2/16 ,  B81C1/00

CPC classification number: B81C1/00611 ,  B41J2/1603 ,  B41J2/1628 ,  B41J2/1631 ,  B41J2/1639 ,  B41J2/1645 ,  B81B2201/052 ,  B81B2203/0353 ,  B81C2201/0104 ,  B81C2201/0121

Abstract: A process for filling one or more etched holes defined in a frontside surface of a wafer substrate. The process includes the steps of: (i) depositing a layer of a thermoplastic first polymer onto the frontside surface and into each hole; (ii) reflowing the first polymer; (iii) exposing the wafer substrate to a controlled oxidative plasma; (iv) optionally repeating steps (i) to (iii); (v) depositing a layer of a photoimageable second polymer; (vi) selectively removing the second polymer from regions outside a periphery of the holes using exposure and development; and (vii) planarizing the frontside surface to provide holes filled with a plug comprising the first and second polymers, which are different than each other. Each plug has a respective upper surface coplanar with the frontside surface.

公开(公告)号：EP2186120A4

公开(公告)日：2012-12-26

申请号：EP08797152

申请日：2008-08-04

Applicant: HEWLETT PACKARD DEVELOPMENT CO

Inventor： KOMMERA SWAROOP K ,  BHOWMIK SIDDHARTHA ,  ORAM RICHARD J ,  RAMAMOORTHI SRIRAM ,  BRAUN DAVID M

IPC: B41J2/16 ,  B81C1/00

CPC classification number: B81C1/00087 ,  B41J2/16 ,  B41J2/1628 ,  B41J2/1629 ,  B41J2/1634 ,  B81B2201/052 ,  H01L21/76898

公开(公告)号：EP1580161B1

公开(公告)日：2008-04-09

申请号：EP04019950.7

申请日：2004-08-23

Applicant: Hewlett-Packard Development Company, L.P.

Inventor： Gore, Makarand ,  Guo, James

IPC: B81B7/00

CPC classification number: B41J2/16 ,  B41J2/1623 ,  B41J2/1628 ,  B41J2/1629 ,  B41J2/1632 ,  B41J2/1639 ,  B41J2/1642 ,  B41J2/1645 ,  B41J2/1646 ,  B81B3/0035 ,  B81B2201/047 ,  B81B2201/052 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L2924/1461 ,  H01L2924/00014 ,  H01L2924/00

公开(公告)号：EP1077475A3

公开(公告)日：2003-04-02

申请号：EP00117155.2

申请日：2000-08-10

Applicant: Applied Materials, Inc.

Inventor： Podlesnik, Dragan V. ,  Chinn, Jeffrey D. ,  Lill, Thorsten B. ,  Pan, Shaoher X. ,  Khan, Anisul ,  Wang, Joan Yiqiong ,  Li, Maocheng

IPC: H01L21/3065 ,  B81C1/00 ,  H01L21/308 ,  H01L21/768

CPC classification number: H01L27/1087 ,  B81B2201/052 ,  B81B2203/0315 ,  B81B2203/033 ,  B81C1/00119 ,  B81C2201/016 ,  H01L21/3065 ,  H01L21/3086

Abstract: The present disclosure pertains to our discovery of a particularly efficient method for etching a multi-part cavity in a substrate. The method provides for first etching a shaped opening, depositing a protective layer over at least a portion of the inner surface of the shaped opening, and then etching a shaped cavity directly beneath and in continuous communication with the shaped opening. The protective layer protects the etch profile of the shaped opening during etching of the shaped cavity, so that the shaped opening and the shaped cavity can be etched to have different shapes, if desired. In particular embodiments of the method of the invention, lateral etch barrier layers and/or implanted etch stops are also used to direct the etching process. The method of the invention can be applied to any application where it is necessary or desirable to provide a shaped opening and an underlying shaped cavity having varying shapes. The method is also useful whenever it is necessary to maintain tight control over the dimensions of the shaped opening.