公开(公告)号：JPH1031544A

公开(公告)日：1998-02-03

申请号：JP2562797

申请日：1997-02-07

Applicant: SYMBIOS LOGIC INC

Inventor： TETERWAK JERZY A

IPC: G06F3/044 ,  G06F3/033 ,  G06F3/041 ,  G06F3/045 ,  G06F3/03

Abstract: PROBLEM TO BE SOLVED: To remove the influence of temperature variation by removing the offset of a signal and then performing detection, and detect the event that a 2nd body comes into contact when one body is in contact such as a touch with two fingers. SOLUTION: A users after touching a key on the digitizing panel with a 1st finger puts it away temporarily and touches it again up to t6 with the 1st finger from t2 to t4, and then further touches a 2nd key on the panel with a 2nd finger from t8 to t10 in the touching state. A band-pass filter or high-pass filter removes a DC signal component or a component of a signal which varies gently from an unprocessed signal like this; and then the output of the filter becomes O at t7 and an output corresponding to the original signal is obtained only at the time of the finger touch, so the detection becomes possible.

公开(公告)号：JPH09246946A

公开(公告)日：1997-09-19

申请号：JP32988396

申请日：1996-12-10

Applicant: SYMBIOS LOGIC INC

Inventor： MAIKERU JIEI MAKUMANASU

IPC: H03K5/02 ,  H03K19/0185 ,  H03K19/0948

Abstract: PROBLEM TO BE SOLVED: To supply high voltage power to an integrated circuit by forming an output voltage level shifted in response to input voltage signals. SOLUTION: The input voltage signals A are supplied through an inverter 100 and a lead 130 to a level shifter 120, the signals A are also supplied to the shifter 120 and a bias circuit 140 receives the input voltage signals A2 at the lead 110. A pad driver 160 receives bias circuit output from the lead 170 and the level shifted voltage from the lead 150, also receives the input voltage signals A and sends out output signals corresponding to a pad PAD onto the lead 180. In this case, the input voltage signals A are the voltage changed between 0-3.3VDC and the output to the pad PAD is the voltage changed between 0-5VDC.

公开(公告)号：JPH09231016A

公开(公告)日：1997-09-05

申请号：JP34489796

申请日：1996-12-25

Applicant: SYMBIOS LOGIC INC

Inventor： RODONII EI DEKONINGU ,  DONARUDO AARU HAMURISEKU

IPC: G06F12/16 ,  G06F3/06 ,  G06F11/20 ,  G06F12/00 ,  G11B20/18

Abstract: PROBLEM TO BE SOLVED: To quickly produce a snap shot copy in order to back up the data in a RAID(redundant array of independent disk) storage subsystem. SOLUTION: This method is composed as follows. That is, a copied RAID logical device has an arithmetic component and non-arithmetic miller component in a process where the environment of the copied RAID logical device in a RAID storage subsystem 100 (copied RAID logical device environment setting process). An environment is set again for a disk drive in the system 100 and an alternate miller component is produced in place of the copied RAID logical device (disk drive environment resetting process). Then the data are generated on the alternate Miller component and a snap shot copy of the data on the arithmetic component is produced (alternate miller component data regeneration process).

公开(公告)号：JPH09179675A

公开(公告)日：1997-07-11

申请号：JP31900996

申请日：1996-11-29

Applicant: SYMBIOS LOGIC INC

Inventor： JIYAAJII TETAAWAKU

IPC: G06F3/041 ,  G06F3/033 ,  G06F3/046 ,  G06F3/048 ,  G06F3/03

Abstract: PROBLEM TO BE SOLVED: To provide a pen detection method and device for detecting the existence of an electromagnetic stylus pen 16 in an active area 14 on a liquid crystal display screen 13. SOLUTION: Plural sensors 18a to 18d are positioned so as to determine a boundary line 19 surrounding the active area 14 of the liquid crystal display screen 13. An electromagnetic signal 17 indicating the existence of the pen 16 in the area 14 is transmitted from the pen 16.

公开(公告)号：JPH09152987A

公开(公告)日：1997-06-10

申请号：JP27764596

申请日：1996-10-21

Applicant: SYMBIOS LOGIC INC

Inventor： MAAKU JIEI JIYANDAA

IPC: G06F13/10 ,  G06F12/02

Abstract: PROBLEM TO BE SOLVED: To store plural pairs of BIOS(basic input/output system) in a single memory device by storing first and second data sets in the storage device starting each first and second address in first and second directions. SOLUTION: A ROM 400 includes a BIOS 402 for device 1 and a BIOS 404 for device 2. The BIOS 402 starts from an address FFFFh, uses the space that the ROM 400 requires is incorporated descending from the address of larger number to the address of smaller number. The other BIOS, that is, the BIOS 404 starts from the address of the smallest number of the ROM 400, that is, an address 0000h, and is incorporated ascendingly. In this case, the address for the BIOS 402 is inverted in only the ROM 400. As a result, the BIOS of the increment of an n-binary system can be used together with the capacity which is equal to the coupling of the both of the BIOS or all the capacity of an extended ROM which is slightly larger.

公开(公告)号：JPH09106320A

公开(公告)日：1997-04-22

申请号：JP21759896

申请日：1996-08-19

Applicant: SYMBIOS LOGIC INC

Inventor： MAAKU MAIKERON ,  SUTEFUAN PII KARIKOTSUTO ,  SUTEIIBUN KEI SUKUUGU

IPC: G06F3/041 ,  G06F3/033 ,  G06F3/048 ,  G06F3/03

Abstract: PROBLEM TO BE SOLVED: To provide a device/method for inputting a graphic, which can use plural styluses (pens) by means of following a signal graphic input face (tablet device). SOLUTION: In the input device, information on the stylus which is uniquely identified for the control circuit of a graphic input face 300 is generated by guiding alternation electric field current 510 and 512 to the four corners (A to D) of tin oxide indium (ITO) of the graphic input face by plural styluses 502 and 504. For multiplex-transmitting identification information contained in a guided current signal in the use form of such graphic input, any of well- known various techniques can be used. The respective styluses can use different frequencies so that a frequency division multiplex method can be applied, for example. A method for shifting the phase of the guided alternation signal and a method for modulating or demodulating identification data sequence peculiar to the respective styluses are contained.

公开(公告)号：JPH08263227A

公开(公告)日：1996-10-11

申请号：JP33028795

申请日：1995-12-19

Applicant: SYMBIOS LOGIC INC

Inventor： CHIYAARUZU DEII BINFUOODO ,  MAAKU EI GEETONAA ,  SUTEIIBUN PII DENII

IPC: G06F11/16 ,  G06F3/06 ,  G06F11/10 ,  G06F11/14 ,  G11B20/18

Abstract: PROBLEM TO BE SOLVED: To recover consistency between a parity and data by performing an exclusive OR operation for each bit of the data stored inside a redundant group relating to an incomplete write I/O operation, calculating the consistent parity and writing it in a pertinent storage area. SOLUTION: A disk array system is provided with a nonvolatile memory 140 and a logic circuit 150 inside a controller 100. The logic circuit 150 responds to reset signals from a host system 200 or low power signals from a no-break power source and checks present drive activity so as to identify the incomplete write I/O operation. Corresponding to the logic circuit 150, the controller records information relating to the incomplete write I/O operation inside the nonvolatile memory 140. The information recorded inside the memory 140 is required so as to specify the redundant group inside an array and can be provided with the identification number of a disk drive and a block address, etc.

公开(公告)号：JPH08235754A

公开(公告)日：1996-09-13

申请号：JP32869895

申请日：1995-12-18

Applicant: SYMBIOS LOGIC INC

Inventor： JIYON DABURIYUU SUCHIYUWAATO ,  DENISU II GEITSU ,  RODONII EI DEKONINGU ,  KAATEISU DABURIYUU RINKU

IPC: G11B20/10 ,  G06F3/06 ,  G06F11/10 ,  G11B20/18 ,  G11B19/02

Abstract: PROBLEM TO BE SOLVED: To improve the operating performance of a disk drive by providing an independent parity auxiliary engine and a local memory to an RA ID storage system so as to omit access to the disk drive required for parity calculation. SOLUTION: During disk write operation, data blocks received through a host SCSI channel 14 are stored in a local memory 136. A parity auxiliary engine 132 reads the data, calculates parity information and stores the result again to the local memory 136. Then a final data block is written to an adequate disk drive from the local memory 136. The local memory 136 consists of a DRAM or the like and is provided with a 72-bit interface to obtain economically a high frequency band. The parity auxiliary engine 132 uses a 128-byte FIFO to calculate the parity of the data in the local memory 136 in the unit of 1 burst at a time.

公开(公告)号：JPH08181283A

公开(公告)日：1996-07-12

申请号：JP14428495

申请日：1995-06-12

Applicant: SYMBIOS LOGIC INC

Inventor： HOON NIYUEN ,  JIYON DEII UOOKAA

IPC: H01L27/04 ,  H01L21/822 ,  H01L23/60 ,  H01L27/02

Abstract: PURPOSE: To obtain an integrated circuit device incorporating a thick field device improved as a protective mechanism against electrostatic discharge(ESD). CONSTITUTION: A thick field device comprises two PN junctions (P region 25 and N+ regions 21, 23) isolated by field oxide 27 and functions as a lateral bipolar transistor having a floating base. A dopant is then implanted, at a controlled concentration, under the field oxide 27 in order to lower the trigger voltage. A well extends beneath metal contacts 31, 33 to minimize the effect of junction spiking. The metal contacts 31, 33 extending while covering the field oxide 27 provide a barrier to migration of ion, otherwise reduce the leak current.

公开(公告)号：JPH08139584A

公开(公告)日：1996-05-31

申请号：JP24709495

申请日：1995-09-26

Applicant: SYMBIOS LOGIC INC

Inventor： MAIKERU JIEI MAKUMANASU ,  FUIRITSUPU DABURIYU BURINGAA ,  ANDORE AARU TEIIN ,  JIERARUDO AARU HAAGU ,  HOON PII NIYUEN

IPC: H01L29/00 ,  H03K19/003

Abstract: PROBLEM TO BE SOLVED: To reduce power consumption by providing a first means supplying power to a protection device when it is in a power on state and a second means supplying power to the protection device when it is in a power off state. SOLUTION: When the power of an I/O circuit is turned on, a transistor 306 supplies Vdd voltage to the gates of transistors 307 and 304. Then, the gates of the transistors 307 and 304 are closed and the I/O circuit is protected. When the power of the I/O circuit is turned off, Vdd is not supplied from a power source and a 5 V signal (transient voltage) is given from an external circuit 1 to an I/O pad 300. At that time, transistors 301 and 302 protect the other parts of the I/O circuit. 5 V added to the pad 300 is reduced by the thresholds of a pair of diodes 310 and 311 and it becomes almost 3 V. The signal of a PUX circuit is used for preventing current passing through the pad 300 through the transistors 301 and 302 during the regular state.