박막 트랜지스터, 그의 제조 방법 및 박막 트랜지스터를구비하는 평판 표시 장치
    41.
    发明授权
    박막 트랜지스터, 그의 제조 방법 및 박막 트랜지스터를구비하는 평판 표시 장치 有权
    薄膜晶体管,制造薄膜晶体管的方法和具有薄膜晶体管的平板显示器件

    公开(公告)号:KR100882677B1

    公开(公告)日:2009-02-06

    申请号:KR1020070083435

    申请日:2007-08-20

    CPC classification number: H01L29/7869 H01L29/458 H01L29/78696

    Abstract: A thin film transistor, a manufacturing method thereof, and a flat panel display device including the same are provided to decrease contact resistance of a semiconductor layer and a metal electrode through external diffusion of oxygen by forming the semiconductor layer made of a compound semiconductor including oxygen. A semiconductor layer(13) having a channel region(13a), a source region(13b), and a drain region(13c) is formed on a substrate(10). A gate electrode is overlapped with the semiconductor layer of the channel region on a gate dielectric film. A source electrode(14b) and a drain electrode(14c) are contacted with the semiconductor layer of the source region and the drain region. The source electrode and the drain electrode include one of more metal ion selected among groups made of Ru, Zn, In, and Sn. A conductive metal oxide layer(15) is formed between the source/drain electrodes and the semiconductor layer, and contains metal ion of the source electrode and the drain electrode.

    Abstract translation: 提供薄膜晶体管及其制造方法以及包括该薄膜晶体管的平板显示装置,以通过形成由包含氧的化合物半导体制成的半导体层来降低半导体层和金属电极通过氧的外部扩散的接触电阻 。 在衬底(10)上形成具有沟道区(13a),源区(13b)和漏区(13c)的半导体层(13)。 栅电极与栅极电介质膜上的沟道区的半导体层重叠。 源电极(14b)和漏电极(14c)与源极区域和漏极区域的半导体层接触。 源电极和漏极包括选自由Ru,Zn,In和Sn组成的组中的一种以上的金属离子。 在源/漏电极和半导体层之间形成导电金属氧化物层(15),并且包含源电极和漏电极的金属离子。

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