액정 표시 장치
    41.
    发明公开

    公开(公告)号:KR1020050047754A

    公开(公告)日:2005-05-23

    申请号:KR1020030081537

    申请日:2003-11-18

    CPC classification number: G02F1/1333 B65G49/06 G02F2202/28 H01L21/67336

    Abstract: 본 발명에 따른 표시 장치용 표시판의 제조 방법은 플라스틱 기판의 외면에 기판 지지대를 접착하는 단계, 플라스틱 기판 내면 위에 복수개의 박막층을 형성하는 단계, 플라스틱 기판으로부터 기판 지지대를 분리하는 단계를 포함하고, 플라스틱 기판과 기판 지지대는 2-에틸헥사아크릴레이트 단량체를 라디칼 중합시켜 제조되는 중합체를 함유하고, 소정 온도 이상의 고온에서 접착력을 잃는 단일 접착제를 사용하여 접착하며, 플라스틱 기판으로부터 기판 지지대를 분리하는 단계는 소정 온도 이상의 온도에서 일정 시간 동안 열 공정을 진행하여 분리한다.

    몰리브덴 박막 패턴의 형성 방법 및 이를 이용한 액정표시 장치의 박막 트랜지스터 기판의 제조방법
    42.
    发明公开
    몰리브덴 박막 패턴의 형성 방법 및 이를 이용한 액정표시 장치의 박막 트랜지스터 기판의 제조방법 失效
    薄膜薄膜图案的形成方法和通过使用薄膜薄膜图案来制造液晶显示装置的薄膜晶体管基板的方法

    公开(公告)号:KR1020040074770A

    公开(公告)日:2004-08-26

    申请号:KR1020030010166

    申请日:2003-02-18

    Abstract: PURPOSE: A forming method of molybdenum thin film patterns is provided to etch a formed molybdenum thin film to make molybdenum thin film patterns, and to cleanly fabricate the molybdenun thin film patterns without residuals, stains or step differences, thereby improving the quality of a substrate. CONSTITUTION: Gate lines consisting of the first gate line layers(221,241) and the second gate line layers(222,242) are formed on an insulating substrate(10). The gate lines include gate lines(22), gate line ends(24), and gate electrodes. Maintenance electrode lines(28) are formed on the insulating substrate(10) in parallel with the gate lines(22). The maintenance electrode lines(28) consist of the first gate line layer(281) and the second gate line layer(282). Data line layers(62,64,68) made of molybdenum-tungsten alloy films are formed on resistive contact layer patterns(55).

    Abstract translation: 目的:提供钼薄膜图案的形成方法来蚀刻形成的钼薄膜以制造钼薄膜图案,并且清洁地制造钼残片,不残留,污渍或阶差,从而提高基板的质量 。 构成:在绝缘基板(10)上形成由第一栅极线层(221,241)和第二栅极线层(222,242)构成的栅极线。 栅极线包括栅极线(22),栅极线端部(24)和栅极电极。 维护电极线(28)与栅极线(22)平行地形成在绝缘基板(10)上。 维护电极线(28)由第一栅线层(281)和第二栅线层(282)构成。 由钼 - 钨合金膜制成的数据线层(62,64,68)形成在电阻性接触层图案(55)上。

    세정력 측정 시료 및 이의 측정 방법
    43.
    发明公开
    세정력 측정 시료 및 이의 측정 방법 失效
    测试样品和方法

    公开(公告)号:KR1020040061670A

    公开(公告)日:2004-07-07

    申请号:KR1020020087955

    申请日:2002-12-31

    Abstract: PURPOSE: A sample and a method for testing detergency are provided to reduce the time for developing a detergent and to accurately check the properties of a detergent by varying the elements contained in the detergent during a test. CONSTITUTION: A detergency testing sample(100) comprises a substrate(10), a gate electrode(20) formed on the substrate and made of a mono silicon doped with metal or ion, a gate insulating film(30) formed on the gate electrode and made of SiO2, a channel layer(40) formed on the upper face of the gate electrode and made of amorphous silicon or poly silicon, a source electrode(50) placed on the upper face of the channel layer and made of mercury, and a drain electrode(60) placed on the upper face of the channel layer and made of mercury.

    Abstract translation: 目的:提供一种用于测试洗涤力的样品和方法,以减少洗涤剂的显影时间,并通过在测试期间改变洗涤剂中所含的元素来精确地检查洗涤剂的性质。 洗涤力测试样品(100)包括基板(10),形成在基板上并由掺杂有金属或离子的单硅制成的栅电极(20),形成在栅电极上的栅极绝缘膜(30) 由SiO 2制成,沟道层(40),形成在栅电极的上表面上,由非晶硅或多晶硅构成,源电极(50)放置在沟道层的上表面并由汞制成,以及 漏极电极(60),放置在沟道层的上表面并由汞制成。

    액정표시장치용 에천트 조성물
    44.
    发明公开
    액정표시장치용 에천트 조성물 无效
    用于液晶显示器件的蚀刻组合物

    公开(公告)号:KR1020040026802A

    公开(公告)日:2004-04-01

    申请号:KR1020020058392

    申请日:2002-09-26

    CPC classification number: C09K13/04 C23F1/20 C23F1/26

    Abstract: PURPOSE: An etchant composition for a liquid crystal display device and a liquid crystal display device prepared by using the composition are provided, to prevent the photoresist attack in etching by controlling the content of nitric acid and acetic acid for obtaining a desired pattern and to allow a Mo/Al-alloy dual layer, a pure Mo single layer and a Mo/Al-alloy/Mo triple layer to be etched at a time. CONSTITUTION: The etchant composition comprises 50-70 wt% of phosphoric acid; 6-7 wt% of nitric acid; 10-16 wt% of acetic acid; and the balance of deionized water. The liquid crystal display device contains the pattern which is etched by using the etchant composition. Optionally the composition comprises further a surfactant.

    Abstract translation: 目的:提供通过使用该组合物制备的液晶显示装置和液晶显示装置的蚀刻剂组合物,以通过控制硝酸和乙酸的含量以获得期望的图案来防止蚀刻中的光致抗蚀剂侵袭,并允许 Mo / Al合金双层,纯Mo单层和一次蚀刻的Mo / Al合金/ Mo三层。 构成:蚀刻剂组成包含50-70重量%的磷酸; 6-7重量%硝酸; 10-16重量%的乙酸; 和去离子水的平衡。 液晶显示装置包含通过使用蚀刻剂组合物进行蚀刻的图案。 任选地,组合物还包含表面活性剂。

    박막 트랜지스터 기판 및 그의 제조 방법
    45.
    发明公开
    박막 트랜지스터 기판 및 그의 제조 방법 失效
    薄膜晶体管及其制造方法

    公开(公告)号:KR1020040024993A

    公开(公告)日:2004-03-24

    申请号:KR1020020056767

    申请日:2002-09-18

    Abstract: PURPOSE: A thin film transistor and its fabrication method are provided to form an interconnection line having low resistance. CONSTITUTION: The thin film transistor comprises an insulation substrate, and a gate line(121) which is formed on the insulation substrate to transfer a scanning signal. And a data line is formed to cross with the gate line and transfers an image signal. At least one of the gate line or the data line is formed with a tri-layer where the first molybdenum layer and an aluminum neodymium layer and the second molybdenum layer are stacked in sequence.

    Abstract translation: 目的:提供薄膜晶体管及其制造方法以形成具有低电阻的互连线。 构成:薄膜晶体管包括绝缘基板和形成在绝缘基板上以传送扫描信号的栅极线(121)。 并且形成数据线与栅极线交叉并传送图像信号。 栅极线或数据线中的至少一个由三层形成,其中第一钼层和铝钕层和第二钼层依次层叠。

    몰리브덴-텅스텐 박막 패턴의 형성 방법 및 이를 이용한액정 표시 장치의 박막 트랜지스터 기판의 제조방법
    46.
    发明公开
    몰리브덴-텅스텐 박막 패턴의 형성 방법 및 이를 이용한액정 표시 장치의 박막 트랜지스터 기판의 제조방법 失效
    用于形成多晶硅薄膜图案的方法和使用其制造液晶显示器的薄膜晶体管(TFT)基板的方法

    公开(公告)号:KR1020030094481A

    公开(公告)日:2003-12-12

    申请号:KR1020020031419

    申请日:2002-06-04

    Abstract: PURPOSE: A method for forming a molybdenum-tungsten thin film pattern and a method for manufacturing a TFT(Thin Film Transistor) substrate of an LCD(Liquid Crystal Display) using the same are provided to be capable of supplying optimum condition capable of forming an easily etched molybdenum-tungsten thin film. CONSTITUTION: A sputtering process is carried out for forming a molybdenum-tungsten thin film from the room temperature to 80 °C. At this time, the sputtering process is carried out with a speed of 0.010-0.015 angstrom/Ws. Then, an etching process is carried out at the molybdenum-tungsten thin film for selectively patterning the molybdenum-tungsten thin film. Preferably, the target size of the sputtering process is in the range of 144 ±10 x 660 ±10(mm x mm).

    Abstract translation: 目的:提供一种用于形成钼 - 钨薄膜图案的方法和使用其的LCD(液晶显示器)的TFT(薄膜晶体管)基板的制造方法,以能够提供能够形成 易蚀刻钨钼薄膜。 构成:对室温至80℃的钼 - 钨薄膜进行溅射处理。 此时,溅射过程以0.010-0.015埃/ Ws的速度进行。 然后,在钼 - 钨薄膜上进行蚀刻处理,以选择性地图案化钼 - 钨薄膜。 优选地,溅射工艺的目标尺寸在144±10×660±10(mm×mm)的范围内。

    몰리브덴-텅스텐 박막의 형성 방법 및 이를 이용한 액정표시 장치의 박막 트랜지스터 기판의 제조방법
    47.
    发明公开
    몰리브덴-텅스텐 박막의 형성 방법 및 이를 이용한 액정표시 장치의 박막 트랜지스터 기판의 제조방법 无效
    用于形成多晶硅薄膜的方法和使用其制造液晶显示器的薄膜晶体管的方法

    公开(公告)号:KR1020030092159A

    公开(公告)日:2003-12-06

    申请号:KR1020020029349

    申请日:2002-05-27

    Abstract: PURPOSE: A method for forming a molybdenum-tungsten thin film and a method for manufacturing thin film transistors of a liquid crystal display using the same are provided to realize a molybdenum-tungsten thin film having high density, large grain size, and low resistance. CONSTITUTION: A first gate wiring layer is formed on a substrate, and MoW is sputtered in a range of 100 to 150 deg. to form a second gate wiring layer. The first gate wiring layer and the second gate wiring layer are etched to form gate patterns including gate lines, gate pads, and gate electrodes. A gate insulating film is deposited on the gate patterns. Semiconductor and resistant contact patterns are formed. MoW is sputtered in a range of 100 to 150 deg. and is patterned to form data wiring. A passivation film is formed and patterned with the gate insulating film for forming contact holes exposing the gate pads, data pads, and drain electrodes. A transparent conductive film is accumulated and etched to form auxiliary gate pads, auxiliary data pads, and pixel electrodes.

    Abstract translation: 目的:提供一种形成钼 - 钨薄膜的方法和使用其制造液晶显示器的薄膜晶体管的制造方法,以实现具有高密度,大晶粒度和低电阻的钼 - 钨薄膜。 构成:在基板上形成第一栅极布线层,在100〜150度的范围内溅射MoW。 以形成第二栅极布线层。 第一栅极布线层和第二栅极布线层被蚀刻以形成包括栅极线,栅极焊盘和栅电极的栅极图案。 栅极绝缘膜沉积在栅极图案上。 形成半导体和电阻接触图形。 MoW在100至150度的范围内溅射。 并被图案化以形成数据布线。 形成钝化膜并用栅极绝缘膜构图,用于形成暴露栅极焊盘,数据焊盘和漏极电极的接触孔。 积聚并蚀刻透明导电膜以形成辅助栅极焊盘,辅助数据焊盘和像素电极。

    박막 트랜지스터 기판의 제조 방법
    48.
    发明公开
    박막 트랜지스터 기판의 제조 방법 失效
    制造薄膜晶体管基板的方法

    公开(公告)号:KR1020030048327A

    公开(公告)日:2003-06-19

    申请号:KR1020010078397

    申请日:2001-12-12

    Abstract: PURPOSE: A method for manufacturing a TFT(Thin Film Transistor) substrate is provided to be capable of preventing the generation of residuals by additionally carrying out a wet cleaning process using a cleaning solution containing nitric acid. CONSTITUTION: A gate line(22) and a gate wiring including a gate electrode(26) are formed on an insulating substrate(10). A gate insulating layer(30) is formed on the resultant structure. A semiconductor layer(40) is formed on the gate insulating layer of the gate electrode. A resistive contact layer is formed on the upper portion of the semiconductor layer. The first conductive layer(601) made of chrome and an upper layer(602) are sequentially formed on the resultant structure. A data line, a source electrode(65) and a data wiring including a drain electrode(66) are formed by etching the first conductive layer and the upper layer using an etchant mixed with Ce(NH4)2(NO3)6 of 8-12 %, NH3 of 4-12 %, and deionized water. Preferably, an additional wet cleaning process is carried out using an etchant containing nitric acid of 4-8 % and deionized water after forming the data wiring.

    Abstract translation: 目的:提供一种制造TFT(薄膜晶体管)基板的方法,通过使用含有硝酸的清洗液进行湿式清洗处理,能够防止残留物的产生。 构成:在绝缘基板(10)上形成栅极线(22)和包括栅电极(26)的栅极布线。 在所得结构上形成栅极绝缘层(30)。 在栅电极的栅极绝缘层上形成半导体层(40)。 电阻接触层形成在半导体层的上部。 在所得结构上依次形成由铬构成的第一导电层(601)和上层(602)。 通过使用与8位的Ce(NH 4)2(NO 3)6混合的蚀刻剂蚀刻第一导电层和上层来形成数据线,源极(65)和包括漏极(66)的数据布线, 12%,NH3为4-12%,去离子水。 优选地,在形成数据布线之后,使用含有4-8%的硝酸的腐蚀剂和去离子水进行另外的湿式清洗工艺。

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