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公开(公告)号：KR100515652B1
公开(公告)日：2005-09-21
申请号：KR1020030008283
申请日：2003-02-10
Applicant: 광주과학기술원
IPC: H01L21/28
Abstract: 본 발명은 p형 질화갈륨층의 상부에 적층되며, Ni, Pd, Pt, Ru, Rh, Ir, Ta, Cr, Mn, Mo, Tc, W, Re, Fe, Ag, Al의 군에서 선택되는 단독 또는 2종 이상을 포함하는 혼합성분인 금속층(1); 상기 금속전극층의 상부에 적층되며, ZnO, In
2 O
3 , Sn
2 O
3 , Cd
2 SnO
4 , CdIn
2 O
4 , Mg
x Zn
1-x O(단, 0＜x＜1), Cd
x Zn
1-x O(단, 0＜x＜1), Mg
x O
1-x (단, 0＜x＜1)의 군에서 선택되는 단독 또는 2종 이상의 혼합성분인 캡핑층(2)을 포함하는 p형 질화갈륨반도체의 오믹접촉형성을 위한 투명전극박막을 제공한다. 상기 구성의 본 발명에 의하면 질화갈륨 반도체의 표면에 오믹접촉 형성시 표면상태가 매우 양호하며, 낮은 비접촉저항과 전류-전압특성 등의 전기적 특성이 우수한 소자의 구현이 가능하다.-
公开(公告)号：KR1020050024078A
公开(公告)日：2005-03-10
申请号：KR1020030061889
申请日：2003-09-04
Applicant: 광주과학기술원
IPC: H01L33/24
Abstract: PURPOSE: A method of manufacturing a ZnO short wavelength light emitting device is provided to acquire stable electrical properties by forming a P type ZnO thin film using a sputtering process instead of a growth process. CONSTITUTION: An N type ZnO thin film(102) is grown on a base substrate(101). A P type ZnO thin film(103) is deposited on the N type ZnO thin film by using sputtering. A heat treatment is performed on the resultant structure to activate the P type ZnO thin film. An electrode(104) is formed on the N type ZnO thin film and the P type ZnO thin film, simultaneously.
Abstract translation: 目的：提供一种制造ZnO短波长发光器件的方法，通过使用溅射工艺而不是生长工艺形成P型ZnO薄膜来获得稳定的电性能。 构成：在基底（101）上生长N型ZnO薄膜（102）。 通过溅射在N型ZnO薄膜上沉积P型ZnO薄膜（103）。 对所得结构进行热处理以活化P型ZnO薄膜。 同时在N型ZnO薄膜和P型ZnO薄膜上形成电极（104）。
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公开(公告)号：KR1020040096871A
公开(公告)日：2004-11-17
申请号：KR1020040078688
申请日：2004-10-04
Applicant: 광주과학기술원
IPC: H01L33/22
Abstract: PURPOSE: A silicon LED(light emitting device) is provided to reduce the whole resistance between a light emitting layer and a metal layer and improve whole light emitting efficiency by etching the upper surface of a silicon substrate without using a mask wherein the upper surface of the silicon substrate has unevenness. CONSTITUTION: Unevenness is formed on the upper surface of a light emitting region of a silicon substrate. A silicon light emitting layer generates light, formed on the silicon substrate with unevenness. The first metal layer injects electrons into the silicon light emitting layer, formed on the silicon light emitting layer. The second metal layer injects holes into the silicon substrate, formed on the back surface of the silicon substrate.
Abstract translation: 目的：提供硅LED（发光器件）以减少发光层和金属层之间的整体电阻，并且通过在不使用掩模的情况下蚀刻硅衬底的上表面来提高整体发光效率，其中， 硅衬底具有不均匀性。 构成：在硅衬底的发光区域的上表面上形成不均匀性。 硅发光层产生形成在硅衬底上的不均匀的光。 第一金属层将电子注入形成在硅发光层上的硅发光层。 第二金属层在硅衬底的后表面上形成硅衬底。
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公开(公告)号：KR100422504B1
公开(公告)日：2004-03-11
申请号：KR1020010000995
申请日：2001-01-08
Applicant: 광주과학기술원
IPC: H01L21/8239
Abstract: PURPOSE: A memory device having the amorphous silicon quantum dots and a manufacturing method thereof are provided to give the memory device having a large capacity and a long memory storing time, being non-volatile and fast, and being capable of reading/writing with a small voltage by using a quantum dot micro structure. CONSTITUTION: A charging film(20) is formed on a front surface of a substrate(10) and an electrode layer(30) is formed on a back surface of the substrate and the surface of the charging film. A plurality of amorphous silicon quantum dots(20a) is uniformly spread within the charging film. The amorphous silicon quantum dot has a sphere shape, a size of 1.0-20.0 nm and a density of 1.0X10¬19-1.0X10¬21 per a cubic centimeter. The charging film has a thickness of 3-100 nm and comprises a silicon oxide or silicon nitride. In order to carry out a memory function, an electron or a hole is restricted in the amorphous silicon quantum dot. Thus, the amorphous silicon quantum dot is surrounded by a barrier layer such as the silicon oxide or silicon nitride.
Abstract translation: 目的：提供具有非晶硅量子点的存储器件及其制造方法，以提供具有大容量和长存储器存储时间的存储器件，该存储器件非易失性和快速，并且能够用 通过使用量子点微结构的小电压。 构成：在基板（10）的正面形成充电膜（20），在基板的背面和充电膜的表面形成电极层（30）。 多个非晶硅量子点（20a）均匀地分布在充电膜内。 非晶硅量子点具有球形，尺寸为1.0-20.0nm，密度为1.0×10 19-1.0×10 21每立方厘米21个。 充电膜具有3-100nm的厚度并且包含氧化硅或氮化硅。 为了实现记忆功能，在非晶硅量子点中限制电子或空穴。 因此，非晶硅量子点被诸如氧化硅或氮化硅的阻挡层包围。
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公开(公告)号：KR100379618B1
公开(公告)日：2003-04-10
申请号：KR1020000054599
申请日：2000-09-18
Applicant: 광주과학기술원
IPC: H01S5/20
Abstract: PURPOSE: A method for activating acceptor of nitride semiconductor using laser is provided to simply activate an acceptor in a nitride semiconductor within very short time using a laser. CONSTITUTION: A laser is irradiated to a nitride semiconductor to activate an acceptor doped in the nitride semiconductor so that a hole density in the nitride semiconductor is increased. The laser has an energies ranges 1.5-6.5 eV. The laser includes KrF laser. The laser is irradiated at an inert gas atmosphere or a vacuous atmosphere having a pressure range of 1x10-10 -760 torr. The acceptor is Mg, Zn, Be, Cd, Ba, Ca, or C. The nitride semiconductor is GaxInyAl1-x-y N, where 0
Abstract translation: 目的：提供一种使用激光激活氮化物半导体受主的方法，以使用激光在很短的时间内简单地激活氮化物半导体中的受主。 构成：对氮化物半导体照射激光，激活掺杂在氮化物半导体中的受体，使氮化物半导体的空穴密度增加。 激光的能量范围为1.5-6.5 eV。 激光器包括KrF激光器。 激光在压力范围为1×10 -10 -760托的惰性气体气氛或真空气氛下进行照射。 受主为Mg，Zn，Be，Cd，Ba，Ca或C.氮化物半导体为GaxInyAl1-xyN，其中0≤x≤1,0≤y≤1，且x +y≤1。 1。 氮化物半导体的照射与加热氮化物半导体的热处理一起进行。
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Patent Agency Ranking
公开(公告)号：KR1020020077557A
公开(公告)日：2002-10-12
申请号：KR1020010017301
申请日：2001-04-02
IPC: H01L21/324
Abstract: PURPOSE: A method for fabricating a zinc oxide semiconductor is provided to improve an electric characteristic by activating a dopant included in a zinc oxide layer. CONSTITUTION: A zinc oxide layer including a dopant is deposited on a silicon substrate or a sapphire substrate. In order to from an n type zinc oxide semiconductor, the dopant selected from a group of Al, In, Ga, and B or an oxide including Al, In, Ga, and B is added to the zinc oxide layer. In order to from a p type zinc oxide semiconductor, the dopant selected from a group of Li, Na, K, N, P, As, and Ni or an oxide including Li, Na, K, N, P, As, and Ni is added to the zinc oxide. The substrate including the zinc oxide layer is loaded into a thermal processing reactor. The dopant of the zinc oxide layer is activated by performing the thermal process for the zincs oxide layer under atmosphere of one element selected from H, O, N, Ar, NO, N2O, and NO2 gas.
Abstract translation: 目的：提供一种制造氧化锌半导体的方法，以通过激活包含在氧化锌层中的掺杂剂来改善电特性。 构成：包含掺杂剂的氧化锌层沉积在硅衬底或蓝宝石衬底上。 为了从n型氧化锌半导体中，将选自Al，In，Ga和B的掺杂剂或包含Al，In，Ga和B的氧化物添加到氧化锌层中。 为了从ap型氧化锌半导体，选自Li，Na，K，N，P，As和Ni中的掺杂剂或包含Li，Na，K，N，P，As和Ni的氧化物是 加入到氧化锌中。 将包含氧化锌层的基板装载到热处理反应器中。 通过在选自H，O，N，Ar，NO，N 2 O和NO 2气体中的一种元素的气氛下进行氧化锌层的热处理来激活氧化锌层的掺杂剂。
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公开(公告)号：KR1020020059872A
公开(公告)日：2002-07-16
申请号：KR1020010000995
申请日：2001-01-08
Applicant: 광주과학기술원
IPC: H01L21/8239
Abstract: PURPOSE: A memory device having the amorphous silicon quantum dots and a manufacturing method thereof are provided to give the memory device having a large capacity and a long memory storing time, being non-volatile and fast, and being capable of reading/writing with a small voltage by using a quantum dot micro structure. CONSTITUTION: A charging film(20) is formed on a front surface of a substrate(10) and an electrode layer(30) is formed on a back surface of the substrate and the surface of the charging film. A plurality of amorphous silicon quantum dots(20a) is uniformly spread within the charging film. The amorphous silicon quantum dot has a sphere shape, a size of 1.0-20.0 nm and a density of 1.0X10¬19-1.0X10¬21 per a cubic centimeter. The charging film has a thickness of 3-100 nm and comprises a silicon oxide or silicon nitride. In order to carry out a memory function, an electron or a hole is restricted in the amorphous silicon quantum dot. Thus, the amorphous silicon quantum dot is surrounded by a barrier layer such as the silicon oxide or silicon nitride.
Abstract translation: 目的：提供一种具有非晶硅量子点的存储器件及其制造方法，其特征在于具有容量大，存储时间长的存储器件，是非易失性且快速的，能够以 使用量子点微结构的小电压。 构成：在基板（10）的前表面上形成充电膜（20），并且在基板的背面和充电膜的表面上形成电极层（30）。 多个非晶硅量子点（20a）在充电膜内均匀地扩散。 非晶硅量子点具有球形，尺寸为1.0-20.0nm，密度为每立方厘米1.0X10-119X101-21。 充电膜的厚度为3〜100nm，由氧化硅或氮化硅构成。 为了执行记忆功能，在非晶硅量子点中限制电子或空穴。 因此，非晶硅量子点被诸如氧化硅或氮化硅的阻挡层包围。
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公开(公告)号：KR100342013B1
公开(公告)日：2002-06-27
申请号：KR1019990052898
申请日：1999-11-26
Applicant: 광주과학기술원
IPC: B32B37/00
Abstract: 본발명은다중양자우물구조층의제조방법에관한것으로, 질화인듐갈륨계우물층및 질화갈륨계장벽층이교대로형성되어있는다중양자우물구조층의제조방법에있어서, 상기질화갈륨계장벽형성에앞서서상기질화인듐갈륨계우물층의표면을수소, 메탄및 염소로이루어진군으로부터선택된기체로처리하는것을특징으로하는본 발명의방법에따르면, 고품질의계면을지니고발광특성이획기적으로향상된다중양자우물구조를제조할수 있으며, 발광다이오드에효과적으로적용할수 있다.
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公开(公告)号：KR100329280B1
公开(公告)日：2002-03-18
申请号：KR1019990017111
申请日：1999-05-13
Applicant: 광주과학기술원
IPC: H01L21/30
Abstract: 본발명은각종광전자소자및 전자소자를제작하는데있어서, 개선된오믹접촉(Ohmic Contact)을형성하기위한 2단계하이브리드표면개질법(TSHTM; Two-Step Hybrid Surface Treatment & Modification)에관한것으로, 본발명에따르면, 메사에칭후 및금속박막형성직전에각각화학용액또는기체플라즈마에의한표면개질을수행함으로써, 전기적, 열적, 구조적특성이우수한오믹접촉을형성할수 있다.
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