公开(公告)号：US20160079054A1

公开(公告)日：2016-03-17

申请号：US14855261

申请日：2015-09-15

Applicant: ASM IP Holding B.V.

Inventor： Shang Chen ,  Viljami Pore ,  Ryoko Yamada ,  Antti Juhani Niskanen

IPC: H01L21/02

CPC classification number: H01L21/0228 ,  C23C16/045 ,  C23C16/345 ,  C23C16/45536 ,  C23C16/45553 ,  H01L21/0217 ,  H01L21/02274

Abstract: Methods and precursors for forming silicon nitride films are provided. In some embodiments, silicon nitride can be deposited by atomic layer deposition (ALD), such as plasma enhanced ALD. In some embodiments, deposited silicon nitride can be treated with a plasma treatment. The plasma treatment can be a nitrogen plasma treatment. In some embodiments the silicon precursors for depositing the silicon nitride comprise an iodine ligand. The silicon nitride films may have a relatively uniform etch rate for both vertical and the horizontal portions when deposited onto three-dimensional structures such as FinFETS or other types of multiple gate FETs. In some embodiments, various silicon nitride films of the present disclosure have an etch rate of less than half the thermal oxide removal rate with diluted HF (0.5%). In some embodiments, a method for depositing silicon nitride films comprises a multi-step plasma treatment.

Abstract translation: 提供了形成氮化硅膜的方法和前体。 在一些实施例中，氮化硅可以通过原子层沉积（ALD）沉积，例如等离子体增强的ALD。 在一些实施例中，沉积的氮化硅可以用等离子体处理。 等离子体处理可以是氮等离子体处理。 在一些实施方案中，用于沉积氮化硅的硅前体包含碘配体。 当沉积到诸如FinFETS或其它类型的多栅极FET的三维结构上时，氮化硅膜可以具有相对均匀的垂直和水平部分的蚀刻速率。 在一些实施方案中，本公开的各种氮化硅膜具有小于具有稀释HF（0.5％）的热氧化物去除速率的一半的蚀刻速率。 在一些实施例中，沉积氮化硅膜的方法包括多步等离子体处理。

公开(公告)号：US20150104955A1

公开(公告)日：2015-04-16

申请号：US14515395

申请日：2014-10-15

Applicant: ASM IP HOLDING B.V.

Inventor： Viljami Pore

IPC: H01L21/02

CPC classification number: H01L21/0217 ,  C23C16/045 ,  C23C16/30 ,  C23C16/32 ,  C23C16/45523 ,  C23C16/45525 ,  H01L21/02112 ,  H01L21/02211 ,  H01L21/02271 ,  H01L21/0228 ,  H01L21/0234 ,  H01L21/31111

Abstract: Methods of depositing boron and carbon containing films are provided. In some embodiments, methods of depositing B,C films with desirable properties, such as conformality and etch rate, are provided. One or more boron and/or carbon containing precursors can be decomposed on a substrate at a temperature of less than about 400° C. In some embodiments methods of depositing silicon nitride films comprising B and C are provided. A silicon nitride film can be deposited by a deposition process including an ALD cycle that forms SiN and a CVD cycle that contributes B and C to the growing film.

公开(公告)号：US12104244B2

公开(公告)日：2024-10-01

申请号：US17953769

申请日：2022-09-27

Applicant: ASM IP Holding B.V.

Inventor： Charles Dezelah ,  Timothee Blanquart ,  René Henricus Jozef Vervuurt ,  Viljami Pore

IPC: C23C16/04 ,  C23C16/08 ,  C23C16/513 ,  C23C16/56 ,  H01L21/285

CPC classification number: C23C16/045 ,  C23C16/08 ,  C23C16/513 ,  C23C16/56 ,  H01L21/28556

Abstract: Disclosed are methods and systems for filling a gap. An exemplary method comprises providing a substrate to a reaction chamber. The substrate comprises the gap. The method further comprises forming a convertible layer on the substrate and exposing the substrate to a conversion reactant. Accordingly, at least a part of the convertible layer is converted into a gap filling fluid. The gap filling fluid at least partially fills the gap. The methods and systems are useful, for example, in the field of integrated circuit manufacture.

公开(公告)号：US20240117494A1

公开(公告)日：2024-04-11

申请号：US18367480

申请日：2023-09-13

Applicant: ASM IP Holding B.V.

Inventor： Tommi Tynell ,  Viljami Pore

IPC: C23C16/513 ,  C23C16/455 ,  C23C16/515

CPC classification number: C23C16/513 ,  C23C16/45519 ,  C23C16/515

Abstract: The disclosure relates to methods of filling gaps in semiconductor substrates. A method of filling a gap is disclosed. The method including providing a substrate having a gap in a reaction chamber, providing a first precursor including silicon and carbon into the reaction chamber in a vapor phase, wherein the first precursor includes at least one unsaturated carbon-carbon bond and at least one atom selected from oxygen and nitrogen. The method further includes providing a first plasma into the reaction chamber to polymerize the first precursor for forming a gap filling material, thereby at least partially filling the gap with the gap filling material. In some embodiments, the at least one unsaturated bond is a double bond.

公开(公告)号：US20230411147A1

公开(公告)日：2023-12-21

申请号：US18334058

申请日：2023-06-13

Applicant: ASM IP Holding, B.V.

Inventor： Jihee Jeon ,  Timothee Blanquart ,  Viljami Pore ,  Charles Dezelah

IPC: H01L21/02 ,  H01J37/32 ,  C23C16/40 ,  C23C16/455

CPC classification number: H01L21/0228 ,  H01L21/02126 ,  H01L21/02164 ,  H01L21/02274 ,  H01L21/02214 ,  H01J37/32357 ,  C23C16/401 ,  C23C16/4554 ,  C23C16/45553 ,  H01J2237/332 ,  H01J2237/2001

Abstract: Disclosed are methods and systems for forming a silicon-containing layer on a substrate. The methods comprise executing a plurality of deposition cycles. A deposition cycle comprises a silicon precursor pulse that comprises exposing the substrate to a silicon precursor. The silicon precursor comprises silicon and one or more of a group 13 element and a group 15 element. A deposition cycle further comprises a plasma pulse that comprises exposing the substrate to a plasma treatment. The plasma treatment comprises generating a plasma.

公开(公告)号：US20230101229A1

公开(公告)日：2023-03-30

申请号：US17953585

申请日：2022-09-27

Applicant: ASM IP Holding B.V.

Inventor： Hannu Huotari ,  Viljami Pore ,  Timothee Blanquart ,  René Henricus Jozef Vervuurt ,  Charles Dezelah ,  Giuseppe Alessio Verni ,  Ren-Jie Chang ,  Michael Givens ,  Eric James Shero

IPC: H01L21/768 ,  H01L21/67 ,  H01L21/02

Abstract: A multiple-layer method for forming material within a gap on a surface of a substrate is disclosed. An exemplary method includes forming a layer of first material overlying the substrate and forming a layer of second (e.g., initially flowable) material within a region of the first material to thereby at least partially fill the gap with material in a seamless and/or void less manner.

公开(公告)号：US11615980B2

公开(公告)日：2023-03-28

申请号：US17544982

申请日：2021-12-08

Applicant: ASM IP Holding B.V.

Inventor： Viljami Pore ,  Zecheng Liu

IPC: H01L21/762 ,  H01L29/06 ,  H01L21/67 ,  H01J37/32

Abstract: There is provided a method of filling one or more recesses by providing the substrate in a reaction chamber and introducing a first reactant to the substrate with a first dose, introducing a second reactant to the substrate with a second dose, wherein the first and the second doses overlap in an overlap area where the first and second reactants react and leave an initially substantially unreacted area where the first and the second areas do not overlap; introducing a third reactant to the substrate with a third dose, the third reactant reacting with the first or second reactant to form deposited material; and etching the deposited material. An apparatus for filling a recess is also disclosed.

公开(公告)号：US11367613B2

公开(公告)日：2022-06-21

申请号：US16987961

申请日：2020-08-07

Applicant: ASM IP Holding B.V.

Inventor： Shang Chen ,  Viljami Pore ,  Ryoko Yamada ,  Antti Juhani Niskanen

IPC: H01L21/02 ,  C23C16/04 ,  C23C16/34 ,  C23C16/455

Abstract: Methods and precursors for forming silicon nitride films are provided. In some embodiments, silicon nitride can be deposited by atomic layer deposition (ALD), such as plasma enhanced ALD. In some embodiments, deposited silicon nitride can be treated with a plasma treatment. The plasma treatment can be a nitrogen plasma treatment. In some embodiments the silicon precursors for depositing the silicon nitride comprise an iodine ligand. The silicon nitride films may have a relatively uniform etch rate for both vertical and the horizontal portions when deposited onto three-dimensional structures such as FinFETS or other types of multiple gate FETs. In some embodiments, various silicon nitride films of the present disclosure have an etch rate of less than half the thermal oxide removal rate with diluted HF (0.5%). In some embodiments, a method for depositing silicon nitride films comprises a multi-step plasma treatment.

公开(公告)号：US20220108915A1

公开(公告)日：2022-04-07

申请号：US17491684

申请日：2021-10-01

Applicant: ASM IP Holding B.V.

Inventor： Zecheng Liu ,  Viljami Pore ,  Tommi Paavo Tynell ,  Yu Xu ,  Mikko Ruoho

IPC: H01L21/768 ,  H01L21/02 ,  H01J37/32

Abstract: The current disclosure relates to methods of depositing silicon-containing material on a substrate comprising a gap, wherein the method comprises providing the substrate in a reaction chamber and depositing a carbon-containing inhibition layer on the substrate, and depositing silicon-containing material on the substrate. Depositing the inhibition layer comprises supplying a carbon precursor comprising carbon in the reaction chamber and supplying first plasma in the reaction chamber to form a first reactive species from the carbon precursor for forming the inhibition layer on the substrate. The inhibition layer is deposited preferentially in the vicinity of the top of the gap. The disclosure further relates to methods of forming a structure, methods of manufacturing a device and to a semiconductor processing apparatus.

公开(公告)号：US20220102195A1

公开(公告)日：2022-03-31

申请号：US17544982

申请日：2021-12-08

Applicant: ASM IP Holding B.V.

Inventor： Viljami Pore ,  Zecheng Liu

IPC: H01L21/762 ,  H01L21/67 ,  H01J37/32 ,  H01L29/06

Abstract: There is provided a method of filling one or more recesses by providing the substrate in a reaction chamber and introducing a first reactant to the substrate with a first dose, introducing a second reactant to the substrate with a second dose, wherein the first and the second doses overlap in an overlap area where the first and second reactants react and leave an initially substantially unreacted area where the first and the second areas do not overlap; introducing a third reactant to the substrate with a third dose, the third reactant reacting with the first or second reactant to form deposited material; and etching the deposited material. An apparatus for filling a recess is also disclosed.