公开(公告)号：DE2615754A1

公开(公告)日：1976-10-28

申请号：DE2615754

申请日：1976-04-10

Applicant: IBM

Inventor： MAGDO INGRID EMESE ,  MAGDO STEVEN

IPC: H01L21/76 ,  H01L21/033 ,  H01L21/223 ,  H01L21/314 ,  H01L21/32 ,  H01L21/762 ,  H01L23/30

Abstract: In the fabrication of integrated circuits, a method is provided for forming masking structures comprising silicon nitride which avoids the stresses and dislocations associated with direct silicon nitride masking as well as the "bird's beak" problems associated with silicon dioxide-silicon nitride composite mask structures. The mask is formed by first forming a silicon dioxide mask having at least one opening through which the substrate is exposed. Then, a mask comprising silicon nitride is formed on the first mask; this mask has at least one opening laterally smaller than the openings in the first mask and respectively in registration with at least some of the openings in said first mask. Thus, the second mask contacts and covers a portion of the exposed silicon substrate under each of the registered openings.

公开(公告)号：CA978280A

公开(公告)日：1975-11-18

申请号：CA159072

申请日：1972-12-13

Applicant: IBM

Inventor： ASHAR KANU ,  MAGDO STEVEN

IPC: H01L29/80 ,  H01L21/331 ,  H01L21/337 ,  H01L27/00 ,  H01L29/73 ,  H01L29/735 ,  H01L29/78 ,  H01L29/808

Abstract: 1337906 Semi-conductor devices INTERNATIONAL BUSINESS MACHINES CORP 1 Nov 1972 [17 Dec 1971] 50285/72 Heading H1K A lateral bipolar transistor constituted by N + type emitter and collector regions 4, 5 and P type base region 13 shares the first-mentioned two regions with a space-charge limited transistor whose base region comprises an N- type substrate 1 adjoining the bipolar base region 13. The arrangement is such that, with increasing emitter-base forward bias, a space-charge limited current flows through the space-charge limited transistor under the control of the bipolar base region 13 before the bias reaches a sufficient level to initiate bipolar transistor action through the base region 13. The relatively high gain of the space-charge limited transistor is thus employed at low emitterbase forward biases, and the onset of bipolar action may be retarded further by entirely surrounding the N + type collector region 5 with the N- type material of the substrate 1. The electronic processes involved in the operation of the device are discussed in the Specification. A complementary structure comprising a PNP lateral bipolar transistor in parallel with and sharing the same emitter and collector regions as a PN-P space-charge limited transistor may be integrated into the same semi-conductor substrate 1 as the device shown in Fig. 1 with the addition of no further diffusion steps. The Fig. 1 device is isolated from the complementary device by an N + type guard ring. The conductivity types of the arrangement may be reversed.

公开(公告)号：AU6613374A

公开(公告)日：1975-08-28

申请号：AU6613374

申请日：1974-02-28

Applicant: IBM

Inventor： MAGDO STEVEN ,  MAGDO INGRID EMESE

IPC: H01L29/73 ,  H01L21/00 ,  H01L21/316 ,  H01L21/331 ,  H01L21/762 ,  H01L21/822 ,  H01L21/8222 ,  H01L23/535 ,  H01L27/04 ,  H01L27/12 ,  H01L5/00 ,  H01L7/00 ,  H01L11/06 ,  H01L11/14 ,  H01L19/00

公开(公告)号：DE2451486A1

公开(公告)日：1975-07-10

申请号：DE2451486

申请日：1974-10-30

Applicant: IBM

Inventor： MAGDO INGRID EMESE ,  MAGDO STEVEN

IPC: H01L29/73 ,  H01L21/00 ,  H01L21/306 ,  H01L21/308 ,  H01L21/331

公开(公告)号：AU4870672A

公开(公告)日：1974-05-09

申请号：AU4870672

申请日：1972-11-09

Applicant: IBM

Inventor： ASHAR KANU ,  MAGDO STEVEN

IPC: H01L29/80 ,  H01L21/331 ,  H01L21/337 ,  H01L27/00 ,  H01L29/73 ,  H01L29/735 ,  H01L29/78 ,  H01L29/808

Abstract: 1337906 Semi-conductor devices INTERNATIONAL BUSINESS MACHINES CORP 1 Nov 1972 [17 Dec 1971] 50285/72 Heading H1K A lateral bipolar transistor constituted by N + type emitter and collector regions 4, 5 and P type base region 13 shares the first-mentioned two regions with a space-charge limited transistor whose base region comprises an N- type substrate 1 adjoining the bipolar base region 13. The arrangement is such that, with increasing emitter-base forward bias, a space-charge limited current flows through the space-charge limited transistor under the control of the bipolar base region 13 before the bias reaches a sufficient level to initiate bipolar transistor action through the base region 13. The relatively high gain of the space-charge limited transistor is thus employed at low emitterbase forward biases, and the onset of bipolar action may be retarded further by entirely surrounding the N + type collector region 5 with the N- type material of the substrate 1. The electronic processes involved in the operation of the device are discussed in the Specification. A complementary structure comprising a PNP lateral bipolar transistor in parallel with and sharing the same emitter and collector regions as a PN-P space-charge limited transistor may be integrated into the same semi-conductor substrate 1 as the device shown in Fig. 1 with the addition of no further diffusion steps. The Fig. 1 device is isolated from the complementary device by an N + type guard ring. The conductivity types of the arrangement may be reversed.

公开(公告)号：DE2317577A1

公开(公告)日：1974-01-17

申请号：DE2317577

申请日：1973-04-07

Applicant: IBM

Inventor： MAGDO INGRID E ,  MAGDO STEVEN

IPC: H01L29/73 ,  H01L21/22 ,  H01L21/32 ,  H01L21/331 ,  H01L21/76 ,  H01L21/762 ,  H01L21/8238 ,  H01L27/082 ,  H01L29/78 ,  H01L19/00

Abstract: A method of fabricating a planar dielectrically isolated semiconductor device by depositing a surface layer of dielectric material on a major surface of a monocrystalline substrate, removing portions of the layer to define annular channels, thermally oxidizing the exposed surface areas thereby forming annular ridges of SiO2, removing portions of the dielectric layer, selectively growing an epitaxial silicon layer over the surface wherein the surfaces of the annular ridges of SiO2 and the regions of epitaxial silicon are substantially co-planar.