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公开(公告)号：LT3571580T
公开(公告)日：2021-10-25
申请号：LT18050137
申请日：2018-01-03
Applicant: IBM
Inventor： GREINER DAN , SLEGEL TIMOTHY , JACOBI CHRISTIAN , SAPORITO ANTHONY , PAPROTSKI VOLODYMYR , MITRAN MARCEL
IPC: G06F9/30
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公开(公告)号：SG11202105503SA
公开(公告)日：2021-06-29
申请号：SG11202105503S
申请日：2020-02-13
Applicant: IBM
Inventor： SLEGEL TIMOTHY , EHRMAN JOHN , GREINER DAN , SAPORITO ANTHONY , TSAI AARON
IPC: G06F9/30
Abstract: A single architected instruction to move data is executed. The executing includes moving data of a specified length from a source location to a destination location in a right-to-left sequence to provide a predictable result. A predictable result is provided, even though a portion of the destination location is contained within the source location from which the data is being moved.
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公开(公告)号：ZA201905199B
公开(公告)日：2021-04-28
申请号：ZA201905199
申请日：2019-08-06
Applicant: IBM
Inventor： GIAMEI BRUCE CONRAD , SCHMIDT DONALD WILLIAM , JACOBI CHRISTIAN , SAPORITO ANTHONY , ROSA DANIEL
Abstract: A facility is provided for collecting time-slice-instrumentation information during processing unit execution. The facility counts, at least in part, occurrence of a specified processing unit event during a time-slice of processing unit execution. The counted events occurring during a first interval of execution and a second interval of execution of the time-slice are retained. The first interval of execution is earlier in the time-slice than the second interval of execution, and the counted events facilitate adjusting performance of the processing unit. In an embodiment, the time-slice is a contiguous period of time of processing unit execution, and the specified processing unit event includes a cache event. The processing unit may interleave processing of multiple different units of work across multiple contiguous time-slices, and during a single time-slice, a single unit of work of the multiple different units of work is processed by the processing unit.
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公开(公告)号：AU2018209079B2
公开(公告)日：2020-10-15
申请号：AU2018209079
申请日：2018-01-12
Applicant: IBM
Inventor： GREINER DAN , SLEGEL TIMOTHY , JACOBI CHRISTIAN , SAPORITO ANTHONY , SHUM CHUNG-LUNG
Abstract: A guarded storage facility sets up a boundary indicating a range of addresses to be guarded or protected. When a program attempts to access an address in a guarded section defined by the boundary, a guarded storage event occurs. Use of this facility facilitates performance of certain tasks within a computing environment, including storage reclamation.
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公开(公告)号：AU2018209084B2
公开(公告)日：2020-10-08
申请号：AU2018209084
申请日：2018-01-12
Applicant: IBM
Inventor： GREINER DAN , SLEGEL TIMOTHY , JACOBI CHRISTIAN , SAPORITO ANTHONY , SHUM CHUNG-LUNG , OSISEK DAMIAN
Abstract: A guarded storage facility sets up a boundary indicating a range of addresses to be guarded or protected. When a program attempts to access an address in a guarded section defined by the boundary, a guarded storage event occurs. Use of this facility facilitates performance of certain tasks within a computing environment, including storage reclamation.
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Patent Agency Ranking
公开(公告)号：AU2018208419B2
公开(公告)日：2020-10-01
申请号：AU2018208419
申请日：2018-01-03
Applicant: IBM
Inventor： GIAMEI BRUCE CONRAD , JACOBI CHRISTIAN , SHUM CHUNG-LUNG , SCHMIDT DONALD WILLIAM , ROSA DANIEL , SAPORITO ANTHONY
IPC: G06F12/0815 , G06F9/52 , G06F12/084
Abstract: A computing environment facility is provided to extend a hold of a cache line in private (or local) cache exclusively after processing a storage operand request. The facility includes determining whether a storage operand request to a storage location shared by multiple processing units of the computing environment is designated hold. In addition, a determination is made whether a state of the corresponding cache line in private cache used for processing the storage operand request is owned exclusively. Based on determining that the storage operand request is designated hold, and that the state of the corresponding cache line in private cache used for processing the storage operand request is owned exclusively, continuing to hold the corresponding cache line in the private cache exclusively after completing processing of the storage operand request. The continuing to hold may include initiating a counter to facilitate the continuing hold for a desired, set interval.
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公开(公告)号：AU2017392846B2
公开(公告)日：2020-09-17
申请号：AU2017392846
申请日：2017-12-15
Applicant: IBM
Inventor： GIAMEI BRUCE CONRAD , SCHMIDT DONALD WILLIAM , JACOBI CHRISTIAN , SAPORITO ANTHONY , ROSA DANIEL
Abstract: A facility is provided for collecting time-slice-instrumentation information during processing unit execution. The facility counts, at least in part, occurrence of a specified processing unit event during a time-slice of processing unit execution. The counted events occurring during a first interval of execution and a second interval of execution of the time-slice are retained. The first interval of execution is earlier in the time-slice than the second interval of execution, and the counted events facilitate adjusting performance of the processing unit. In an embodiment, the time-slice is a contiguous period of time of processing unit execution, and the specified processing unit event includes a cache event. The processing unit may interleave processing of multiple different units of work across multiple contiguous time-slices, and during a single time-slice, a single unit of work of the multiple different units of work is processed by the processing unit.
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公开(公告)号：DE112018002028T5
公开(公告)日：2020-01-16
申请号：DE112018002028
申请日：2018-06-14
Applicant: IBM
Inventor： RECKTENWALD MARTIN , SAPORITO ANTHONY , JACOBI CHRISTIAN , TSAI AARON , REICHART JOHANNES CHRISTIAN , HELMS MARKUS MICHAEL , MAYER ULRICH
IPC: G06F12/08
Abstract: Offenbart hierin ist ein virtueller Cache und ein Verfahren in einem Prozessor zur Unterstützung von mehreren Threads auf derselben Cachezeile. Der Prozessor ist so konfiguriert, dass er einen virtuellen Speicher und mehrere Threads unterstützt. Das virtuelle Cacheverzeichnis enthält eine Vielzahl von Verzeichniseinträgen, wobei jeder Eintrag zu einer Cachezeile gehört. Jede Cachezeile hat ein entsprechendes Tag. Das Tag enthält eine logische Adresse, eine Adressraumkennung, einen Bitanzeiger für eine reale Adresse und ein threadweises Gültigkeitsbit für jeden Thread, der auf die Cachezeile zugreift. Wenn ein nachfolgender Thread feststellt, dass die Cachezeile für diesen Thread gültig ist, wird das Gültigkeitsbit für diesen Thread gesetzt, während beliebige Gültigkeitsbits für andere Threads nicht ungültig gemacht werden.
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公开(公告)号：AU2018208453A1
公开(公告)日：2019-06-13
申请号：AU2018208453
申请日：2018-01-09
Applicant: IBM
Inventor： GIAMEI BRUCE CONRAD , JACOBI CHRISTIAN , SHUM CHUNG-LUNG , SCHMIDT DONALD WILLIAM , ROSA DANIEL , SAPORITO ANTHONY
IPC: G06F9/30
Abstract: Processing of a storage operand request identified as restrained is selectively, temporarily suppressed. The processing includes determining whether a storage operand request to a common storage location shared by multiple processing units of a computing environment is restrained, and based on determining that the storage operand request is restrained, then temporarily suppressing requesting access to the common storage location pursuant to the storage operand request. The processing unit performing the processing may proceed with processing of the restrained storage operand request, without performing the suppressing, where the processing can be accomplished using cache private to the processing unit. Otherwise the suppressing may continue until an instruction, or operation of an instruction, associated with the storage operand request is next to complete.
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公开(公告)号：AU2018208419A1
公开(公告)日：2019-06-13
申请号：AU2018208419
申请日：2018-01-03
Applicant: IBM
Inventor： GIAMEI BRUCE CONRAD , JACOBI CHRISTIAN , SHUM CHUNG-LUNG , SCHMIDT DONALD WILLIAM , ROSA DANIEL , SAPORITO ANTHONY
IPC: G06F12/0815 , G06F9/52 , G06F12/084
Abstract: A computing environment facility is provided to extend a hold of a cache line in private (or local) cache exclusively after processing a storage operand request. The facility includes determining whether a storage operand request to a storage location shared by multiple processing units of the computing environment is designated hold. In addition, a determination is made whether a state of the corresponding cache line in private cache used for processing the storage operand request is owned exclusively. Based on determining that the storage operand request is designated hold, and that the state of the corresponding cache line in private cache used for processing the storage operand request is owned exclusively, continuing to hold the corresponding cache line in the private cache exclusively after completing processing of the storage operand request. The continuing to hold may include initiating a counter to facilitate the continuing hold for a desired, set interval.
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