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公开(公告)号：AU532006B2
公开(公告)日：1983-09-15
申请号：AU5500180
申请日：1980-01-29
Applicant: SONY CORP
Inventor： TSUCHIYA TAKAO , SONEDA MITSUO
Abstract: A non-recursive transversal filter circuit employs a charge transfer device in which certain of the capacitive storage elements are divided into first and second capacitive portions having predetermined capacitance relationships. The charge in the second capacitive storage elements is sensed at predetermined times to produce an output signal. The relative capacitances of the second capacitance portions provide weighting factors to the filter. Embodiments include bucket brigade devices with bipolar and FET transistors as well as charge coupled devices.
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公开(公告)号：GB2108351A
公开(公告)日：1983-05-11
申请号：GB8214621
申请日：1982-05-19
Applicant: SONY CORP
Inventor： SONEDA MITSUO , NOGUCHI TAKASHI , OHTSU TAKAJI
Abstract: A conventional solid state image sensing system produces signals is which are applied to a variable gain current amplifier 11, 12, 13, 14, characterised in that the gain is set (possibly automatically in accordance with overall scene brightness) by setting the currents produced by two gauged control current sources 22, 23. FET's may be used in place of the bipolar transistors shown.
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公开(公告)号：DE3218971A1
公开(公告)日：1983-01-20
申请号：DE3218971
申请日：1982-05-19
Applicant: SONY CORP
Inventor： SONEDA MITSUO , NOGUCHI TAKASHI , OHTSU TAKAJI
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公开(公告)号：DE3221972A1
公开(公告)日：1983-01-05
申请号：DE3221972
申请日：1982-06-11
Applicant: SONY CORP
Inventor： SONEDA MITSUO , OTSU TAKAJI , KUTATAGI KEN
Abstract: A liquid crystal matrix display device has a plurality of liquid crystal display elements arranged in an X-Y matrix pattern. Vertical transmitting lines are connected to all of the display elements of each column, and horizontal transmitting lines are connected to each of the display elements of each row. Each of the vertical lines is connected through an input switching element to an input circuit to receive a video input signal and a horizontal pulse generator provides sequential pulse signals to control terminals of the input switching elements. In order to compensate for crosstalk that occurs because of parasitic capacitance between the vertical transmitting lines and the liquid crystal display elements, auxiliary lines are provided for the columns of such display elements, and each has a predetermined compensating capacitance relative to its associated liquid crystal display elements. A compensating signal, which is an inverted version of the video signal, is applied in succession to the auxiliary lines to compensate for any crosstalk.
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公开(公告)号：DE3114886A1
公开(公告)日：1982-02-25
申请号：DE3114886
申请日：1981-04-13
Applicant: SONY CORP
Inventor： SONEDA MITSUO
Abstract: A filter circuit comprising a charge transfer device of the type which includes first and second sets of charge storage devices, such as capacitors, the first and second sets of charge storage devices being supplied with first and second clock signals, respectively, and further including first and second sets of switches which are actuated in response to the first and second clock signals, respectively, each switch being operable, when actuated, to transfer charge between a charge storage device in one set and a charge storage device in the other set, thereby transferring a charge through succeeding switches to be temporarily stored in succeeding charge storage devices. A semiconductor element, such as a transistor, is actuated in response either to the first or to the second clock signals for transferring the charge stored in a first predetermined charge storage device to a second predetermined charge storage device. An output circuit is coupled to a preselected charge storage device for deriving an output signal from the filter circuit.
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Patent Agency Ranking
公开(公告)号：FR2471653A1
公开(公告)日：1981-06-19
申请号：FR8025703
申请日：1980-12-03
Applicant: SONY CORP
Inventor： TSUCHIYA TAKAO , SONEDA MITSUO , NAKAMURA ISA
IPC: G11C27/04 , G11C19/18 , H01L21/339 , H01L29/762
Abstract: A bucket brigaded device is provided which includes first and second clocking signal generators for generating a first set and a second set of clocking signals respectively, a plurality of successive capacitors for sequentially holding charge level representing an input signal, and a plurality of transistors for controlling the transfer of charge levels from one capacitor to another. Each of the transistors is connected between adjacent capacitors. The bucket brigaded device further comprises a first clocking signal driver for supplying one of the first set of clocking signals to each capacitor, and a second clocking signal driver for supplying one of the second set of clocking signals to each transistor.
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公开(公告)号：FR2532777B1
公开(公告)日：1989-04-14
申请号：FR8314335
申请日：1983-09-08
Applicant: SONY CORP
Inventor： SONEDA MITSUO , MAEKAWA TOSHIZAKU , OTSU KOUJI
Abstract: A signal translating circuit is disclosed in which an input signal is supplied to a source follower transistor, a bootstrap capacitive component is presented between the gate and source of the source follower transistor, the signal from the source follower transistor is supplied through a first transmission gate to a next stage, and also led out to an output terminal. Further, the circuit formed of the source follower transistor and the first transmission gate is sequentially connected and the source follower transistor and the first transmission gate are alternately driven with different phases to each other whereby the input signal is sequentially transmitted at each stage. Furthermore, a second transmission gate is connected between the output terminal of the source follower transistor and the ground in which after the output signal at the output terminal rises up and falls down once, the second transmission gate is turned on by the signal relating to the output from the stages following the succeeding stage to thereby make the level of the signal when the output signal at the output terminal falls down stable. Thus, undesired potential fluctuation is not generated on the output line.
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公开(公告)号：FR2507803B1
公开(公告)日：1987-01-16
申请号：FR8210233
申请日：1982-06-11
Applicant: SONY CORP
Inventor： SONEDA MITSUO , OTSU TAKAJI , KUTARAGI KEN
Abstract: A liquid crystal matrix display device has a plurality of liquid crystal display elements arranged in an X-Y matrix pattern. Vertical transmitting lines are connected to all of the display elements of each column, and horizontal transmitting lines are connected to each of the display elements of each row. Each of the vertical lines is connected through an input switching element to an input circuit to receive a video input signal and a horizontal pulse generator provides sequential pulse signals to control terminals of the input switching elements. In order to compensate for crosstalk that occurs because of parasitic capacitance between the vertical transmitting lines and the liquid crystal display elements, auxiliary lines are provided for the columns of such display elements, and each has a predetermined compensating capacitance relative to its associated liquid crystal display elements. A compensating signal, which is an inverted version of the video signal, is applied in succession to the auxiliary lines to compensate for any crosstalk.
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公开(公告)号：GB2130036B
公开(公告)日：1986-06-11
申请号：GB8323730
申请日：1983-09-05
Applicant: SONY CORP
Inventor： SONEDA MITSUO , MAEKAWA TOSHIKAZU , OTSU KOUJI
Abstract: A signal translating circuit is disclosed in which an input signal is supplied to a source follower transistor, a bootstrap capacitive component is presented between the gate and source of the source follower transistor, the signal from the source follower transistor is supplied through a first transmission gate to a next stage, and also led out to an output terminal. Further, the circuit formed of the source follower transistor and the first transmission gate is sequentially connected and the source follower transistor and the first transmission gate are alternately driven with different phases to each other whereby the input signal is sequentially transmitted at each stage. Furthermore, a second transmission gate is connected between the output terminal of the source follower transistor and the ground in which after the output signal at the output terminal rises up and falls down once, the second transmission gate is turned on by the signal relating to the output from the stages following the succeeding stage to thereby make the level of the signal when the output signal at the output terminal falls down stable. Thus, undesired potential fluctuation is not generated on the output line.
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公开(公告)号：CA1185006A
公开(公告)日：1985-04-02
申请号：CA403337
申请日：1982-05-19
Applicant: SONY CORP
Inventor： SONEDA MITSUO , NOGUCHI TAKASHI , OHTSU TAKAJI
Abstract: Solid-state image pickup apparatus, such as an MOS imager, has a two-dimensional array of picture element units each formed of a photo sensitive element and a gating element. The picture unit elements discharge a signal charge onto vertical and horizontal transmitting lines in response to vertical and horizontal scanning pulses. Then, a resulting signal current is used to develop an output video signal. In order to give the output video signal a good S/N ratio, a gain-controlled current amplifier is employed. In several embodiments, the gain-controlled amplifier includes first through fourth transistors with the base-emitter junctions of the first and second transistors and of the third and fourth transistors connected in series, with a constant current source coupled to the first transistor, controlled current sources connected to the second and third transistors, and a load device coupled to the fourth transistor. In other embodiments, the gain controlled amplifier is formed of first, second, and third current mirror circuits connected in a balanced-current arrangement. Electrically variable resistances, e.g., MOS transistors, are coupled to the output transistors of the first and second current mirror circuits to control the current gain.
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