公开(公告)号：FR2845522A1

公开(公告)日：2004-04-09

申请号：FR0212278

申请日：2002-10-03

Applicant: ST MICROELECTRONICS SA

Inventor： MARTY MICHEL ,  CORONEL PHILIPPE ,  LEVERD FRANCOIS

IPC: H01L29/73 ,  H01L21/331 ,  H01L29/08 ,  H01L29/417 ,  H01L29/732 ,  H01L21/74

Abstract: An integrated circuit incorporates a buried layer of the type with conductivity determined in a plane essentially parallel to a plane of a main surface of the circuit. The median part of this buried layer (23, 24) is filled with a metallic type material (29). An Independent claim is also included for a method for the formation of a layer buried in a semiconductor substrate of an integrated circuit.

公开(公告)号：FR2813707A1

公开(公告)日：2002-03-08

申请号：FR0011419

申请日：2000-09-07

Applicant: ST MICROELECTRONICS SA

Inventor： DUTARTRE DIDIER ,  CHANTRE ALAIN ,  MARTY MICHEL ,  JOUAN SEBASTIEN

IPC: H01L21/331 ,  H01L29/10 ,  H01L21/28

Abstract: Fabrication of a bipolar transistor on a monocrystalline silicon substrate (1) with a first type of conductivity incorporates a stage of carbon implantation at the surface of the substrate followed by annealing, before epitaxial formation of the base of the transistor in the form of a multi-layer (T) semiconductor incorporating at least one lower layer (4), a median heavily doped layer (5) with a second type of conductivity and a upper layer (6) which contacts a heavily doped emitter (9) with the first type of conductivity. An Independent claim is included for a hetero-junction bipolar transistor produced.

公开(公告)号：FR2803091B1

公开(公告)日：2002-03-08

申请号：FR9916283

申请日：1999-12-22

Applicant: ST MICROELECTRONICS SA

Inventor： MARTY MICHEL ,  DUTARTRE DIDIER ,  CHANTRE ALAIN ,  FELLOUS CYRIL

IPC: H01L21/223 ,  H01L21/331 ,  H01L21/8222

公开(公告)号：FR2811473A1

公开(公告)日：2002-01-11

申请号：FR0008686

申请日：2000-07-04

Applicant: ST MICROELECTRONICS SA

Inventor： MARTY MICHEL ,  BAUDRY HELENE ,  LEVERD FRANCOIS

IPC: H01L21/316 ,  H01L21/762 ,  H01L21/763 ,  H01L21/331 ,  H01L21/306

Abstract: Prior to the implementation of transistors, one configures within the substrate a deep insulated drain following the configuration within the substrate of a less deep insulated drain lengthening the deep drain. The configuration of the deep drain includes a coating of the internal walls of the drain by an initial layer of oxide (100) obtained by a rapid thermal oxidation and a filling of the drain with polysilicon (120) inside an envelope formed with an insulating material (101). The configuration of the less deep drain also includes a coating of the internal walls with an initial oxide layer (15) obtained by rapid thermal oxidation and a filling with an insulating material (16, 17). An Independent claim is also included for an integrated circuit incorporating within a substrate some insulating deep drain and less deep drain regions separating the transistors.

公开(公告)号：FR2804247A1

公开(公告)日：2001-07-27

申请号：FR0000791

申请日：2000-01-21

Applicant: ST MICROELECTRONICS SA

Inventor： MARTY MICHEL

IPC: H01L21/331

Abstract: A method for the production of a bipolar transistor with an auto-aligned emitter and extrinsic base comprises:- a) the formation on a layer (15) for the formation of the base of the transistor of a pile of a layers of SiGe alloy (16), silicon oxide (17) and silicon nitride (18); b) forming in this layer a false emitter (20); c) forming in the layer (15) for the formation of the base a region of extrinsic base (22) and siliconising this region of extrinsic base; d) covering the region of extrinsic base (22) and the false emitter (20) with a layer of silicon dioxide (24) that is mechanic-chemically polished up to the level of the false emitter (20); e) engraving the false emitter (20) to form a window (25); and f) forming in the window (25) and on the layer of silicon dioxide (24) an emitter of polysilicon (27).

公开(公告)号：FR2799048A1

公开(公告)日：2001-03-30

申请号：FR9911895

申请日：1999-09-23

Applicant: ST MICROELECTRONICS SA

Inventor： CHANTRE ALAIN ,  MARTY MICHEL ,  BAUDRY HELENE

IPC: H01L29/73 ,  H01L21/205 ,  H01L21/302 ,  H01L21/3065 ,  H01L21/331 ,  H01L29/737 ,  H01L21/00 ,  H01L21/22 ,  H01L29/732

Abstract: Bipolar transistor fabrication includes a step of producing a base region (8) comprising an extrinsic base (800) and an intrinsic base, and a step of producing an emitter block having a narrower lower part located in an emitter-window above the intrinsic base. Production of the extrinsic base (800) involves dopant implantation after defining the emitter-window, on both sides at a determined distance from the lateral limits of the emitter-window, with self-alignment about the emitter-window, and before emitter block formation. An oxide block (13) is formed on an insulating layer located above the intrinsic base. The oxide block (13) has a narrower lower part (130) located in an etched hole of the insulating layer and whose dimensions correspond to those of the emitter-window, and an upper wider part (131) resting on the insulating layer. The lateral sides of the etched hole of the insulating layer are self-aligned with the lateral sides (FV) of the upper part of the oxide block. Ion implantation of the extrinsic base is formed on both sides of the upper part of the oxide block (13).

公开(公告)号：FR2767389B1

公开(公告)日：1999-10-29

申请号：FR9710429

申请日：1997-08-18

Applicant: ST MICROELECTRONICS SA

Inventor： JAOUEN HERVE ,  MARTY MICHEL

IPC: H01L33/00 ,  G02B6/42 ,  H01L27/14 ,  H01L31/0232 ,  H01L23/10

公开(公告)号：FR3014243B1

公开(公告)日：2017-05-26

申请号：FR1362088

申请日：2013-12-04

Applicant: ST MICROELECTRONICS SA ,  STMICROELECTRONICS (CROLLES 2) SAS ,  COMMISSARIAT ENERGIE ATOMIQUE

Inventor： GIRARD DESPROLET ROMAIN ,  LHOSTIS SANDRINE ,  BOUTAMI SALIM ,  MARTY MICHEL

IPC: H01L27/146 ,  G02B5/20

公开(公告)号：FR3041772A1

公开(公告)日：2017-03-31

申请号：FR1559267

申请日：2015-09-30

Applicant: ST MICROELECTRONICS SA ,  STMICROELECTRONICS (CROLLES 2) SAS ,  COMMISSARIAT ENERGIE ATOMIQUE

Inventor： GIRARD DESPROLET ROMAIN ,  MARTY MICHEL ,  BOUTAMI SALIM ,  LHOSTIS SANDRINE

IPC: G02B5/20 ,  H01L27/146

Abstract: L'invention concerne un procédé de fabrication d'un filtre spectral comprenant les étapes successives suivantes : a) former, dans une première couche en un premier matériau, un premier barreau rectangulaire (27) en un deuxième matériau d'indice optique différent de celui du premier matériau ; et b) former, dans une deuxième couche ou dans la deuxième couche et à la fois dans une partie au moins de la première couche, un deuxième barreau rectangulaire (33) en le deuxième matériau et en contact avec le premier barreau, la deuxième couche reposant sur la première couche et étant en le premier matériau.

公开(公告)号：FR3009889B1

公开(公告)日：2016-12-23

申请号：FR1358138

申请日：2013-08-23

Applicant: COMMISSARIAT ENERGIE ATOMIQUE ,  STMICROELECTRONICS (CROLLES 2) SAS ,  ST MICROELECTRONICS SA

Inventor： MARTY MICHEL ,  JOUAN SEBASTIEN ,  FREY LAURENT ,  BOUTAMI SALIM

IPC: H01L31/0232