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公开(公告)号:JP2001230041A
公开(公告)日:2001-08-24
申请号:JP2000372324
申请日:2000-12-07
Applicant: XEROX CORP
Inventor: CHRISTOPHER L CHUA , FORK DAVID K , KIM PATRICK G , ROMANO LINDA
IPC: G01R1/06 , H01L21/56 , H01L23/32 , H01L23/48 , H01L23/485 , H01L23/52 , H01R4/04 , H01R12/52 , H01R43/02 , H05K3/32
Abstract: PROBLEM TO BE SOLVED: To provide a bonding technique enabling ultramicro processing with improved thermal shock proof and mechanical shock proof. SOLUTION: The method comprises a step for forming a first device having first contact structure furnished with at least one spring contact 15, a step for forming a second device 21 having a second contact structure, a step for applying an adhesive on at least either the first or the second device 14, 21, a step for aligning the first and the second devices 14, 21, a process for aligning the first and the second devices 14, 21 close enough with each other so that the first and the second contact structures are interconnected and the adhesive surrounds at least part of the contact structures, and a step for curing the adhesive. It is a method of interconnecting the two devices, where the step for applying the adhesive is done before the step of bringing the first and the second devices 14,21 into sufficient proximity with each other.
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公开(公告)号:JP2000198278A
公开(公告)日:2000-07-18
申请号:JP37149199
申请日:1999-12-27
Applicant: XEROX CORP
Inventor: BRINGANS ROSS D , NOOLANDI JAAN , BIEGELSEN DAVID K , FORK DAVID K , ELROD SCOTT A
Abstract: PROBLEM TO BE SOLVED: To provide a system for rapidly writing or rewriting a lithographic printing plate by a process for eliminating a chemical solution. SOLUTION: The printing plate comprises, on its surface 18, an electrically grounded substrate 50, a charge generating layer 52 formed on the grounded substrate 50, and an electron transporting layer 54 formed on the layer 52. In this case, a lithographic plate s printed by giving an influence to hydrophobic and hydrophilic characteristics of the plate by controlling a surface energy. An ink is applied to the plate along its image, and the image is rapidly formed on a recording medium.
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公开(公告)号:JPH11177785A
公开(公告)日:1999-07-02
申请号:JP27989098
申请日:1998-10-01
Applicant: XEROX CORP
Inventor: FORK DAVID K , FISKE THOMAS G
Abstract: PROBLEM TO BE SOLVED: To provide a compact two-dimensional(2D) scanning array which suppresser energy consumption to a minimum. SOLUTION: This system is provided with a two-dimensional scanning device. In this case, this two-dimensional scanning device forms a transparent substrate A1 having two planes and a two-dimensional array for converting light into an electric signal, and plural photoelectric sites are provided on the first plane of the transparent substrate 41, while being formed integrally. Furthermore, a two-dimensional light source 49 is provided while being composed of light- emitting diodes 310, 330 and 350 formed integrally on the second plane of the transparent substrate 41 or arranged closer to a second plane. Thus, the two-dimensional scanning array is made compact and while the electronic control of color balance in white illumination is made possible, energy consumption can be suppressed to a minimum.
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公开(公告)号:JPH1064822A
公开(公告)日:1998-03-06
申请号:JP14865297
申请日:1997-05-22
Applicant: XEROX CORP
Inventor: FORK DAVID K , BOYCE JAMES B , MEI PING , READY STEVE , JOHNSON RICHARD I , ANDERSON GREG B
IPC: H01L21/02 , H01L21/20 , H01L21/205 , H01L21/336 , H01L27/12 , H01L29/786
Abstract: PROBLEM TO BE SOLVED: To provide a technique for finer and even particle size of polycrystal silicon without increasing manufacture time and cost. SOLUTION: Used for a semiconductor device wherein a silicon layer 104 formed on a substrate 100 is irradiated with a laser beam 106 for crystallization so that a polycrystal silicon layer 108 is obtained, a buffer layer 102 is formed between the substrate 100 and the silicon layer 104. Relating to such buffering substrate as containing the buffer layer 102, the buffer layer 102 has a melting point higher than the limit temperature of the substrate 100, in addition, at crystallization of the silicon layer 104, it regulates nucleus generation density of the silicon layer 104 for forming an even silicon crystal particles on the buffer layer 102, and functions as a base for isotropic particle growth in crystallization process of the silicon layer 104.
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公开(公告)号:JP2009049428A
公开(公告)日:2009-03-05
申请号:JP2008272411
申请日:2008-10-22
Applicant: Xerox Corp , ゼロックス コーポレイションXerox Corporation
Inventor: FORK DAVID K , BOYCE JAMES B , MEI PING , READY STEVE , JOHNSON RICHARD I , ANDERSON GREG B
IPC: H01L21/20 , H01L21/02 , H01L21/205 , H01L21/336 , H01L27/12 , H01L29/786
CPC classification number: H01L21/0237 , H01L21/02488 , H01L21/02532 , H01L21/0262 , H01L21/02675 , Y10S438/967 , Y10T428/24479 , Y10T428/24926 , Y10T428/265
Abstract: PROBLEM TO BE SOLVED: To provide a technique for finer and even particle size of polycrystal silicon without increasing manufacture time and cost. SOLUTION: Used for a semiconductor device wherein a silicon layer 104 formed on a substrate 100 is irradiated with a laser beam 106 for crystallization so that a polycrystal silicon layer 108 is obtained, a buffer layer 102 is formed between the substrate 100 and the silicon layer 104. Relating to such buffered substrate as containing the buffer layer 102, the buffer layer 102 has a melting point higher than the limit temperature of the substrate 100, in addition, at crystallization of the silicon layer 104, it regulates nucleus generation density of the silicon layer 104 for forming an even silicon crystal particles on the buffer layer 102, and functions as a base for isotropic particle growth in crystallization process of the silicon layer 104. COPYRIGHT: (C)2009,JPO&INPIT
Abstract translation: 要解决的问题:提供一种在不增加制造时间和成本的情况下提供更精细甚至粒径的多晶硅的技术。 解决方案:用于其上形成在基板100上的硅层104用激光束106照射以进行结晶的半导体器件,从而获得多晶硅层108,在基板100和基板100之间形成缓冲层102 与含有缓冲层102的缓冲基板相比,缓冲层102的熔点高于基板100的极限温度,此外,在硅层104的结晶化时,其调节核产生 用于在缓冲层102上形成均匀的硅晶粒的硅层104的密度,并且作为硅层104的结晶过程中的各向同性粒子生长的基底起作用。(C)2009,JPO&INPIT
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公开(公告)号:JP2004056133A
公开(公告)日:2004-02-19
申请号:JP2003197042
申请日:2003-07-15
Applicant: Xerox Corp , ゼロックス・コーポレーション
Inventor: VAN SCHUYLENBERGH KOENRAAD F , CHRISTOPHER L CHUA , FORK DAVID K
IPC: H01F17/02 , H01F17/00 , H01F27/36 , H01L23/522 , H01L23/64
CPC classification number: H01L23/5227 , H01F17/0033 , H01F27/362 , H01G5/18 , H01G5/38 , H01L23/645 , H01L24/45 , H01L24/48 , H01L2223/6611 , H01L2224/451 , H01L2224/45124 , H01L2224/45147 , H01L2224/4813 , H01L2924/00014 , H01L2924/01078 , H01L2924/01079 , H01L2924/14 , H01L2924/19041 , H01L2924/19104 , H01L2924/30107 , H01L2924/3011 , H01L2924/00 , H01L2224/05599
Abstract: PROBLEM TO BE SOLVED: To provide an out-of-plane micro-coil with a ground-plane structure.
SOLUTION: A patterned ground-plane is formed between an out-of-plane micro-coil structure and an integrated circuit (IC) underneath it. The micro-coil structure includes a series of loops extending from a base pad formed on a dielectric layer. Using a central ground-plane structure arranged below the base pad of the micro-coil, loss due to the capacitive coupling of the coil to a substrate is minimized. A ground plane structure having low resistance of which the ends are arranged across both ends of the micro-coil, thereby magnetic loss is decreased. The low-resistance ground-plane may have a slot for reducing a loop size of an eddy current path; and the ground-plane is formed from at least one of an upper IC metal layer, a copper pad formed between a non-activated layer in IC and the dielectric layer, and a part or combination of metal portions used in formation of the micro-coil.
COPYRIGHT: (C)2004,JPO-
公开(公告)号:JP2003097617A
公开(公告)日:2003-04-03
申请号:JP2002195437
申请日:2002-07-04
Applicant: XEROX CORP
Inventor: FORK DAVID K , CHRISTOPHER L CHUA
IPC: B81B3/00 , F16F1/18 , G01R1/067 , G01R3/00 , H01H1/02 , H01L21/58 , H01R13/03 , H01R13/24 , H05K1/11 , H05K3/40
Abstract: PROBLEM TO BE SOLVED: To provide effective method which manufactures elastic structure depositing a passive and conducting coat on the elastic structure after releasing. SOLUTION: An elastic metallic layer is formed on a releasing layer by forming it on a substrate. An elastic metallic finger is formed to corrode the elastic metallic layer by employing a first mask. A releasing window is prescribed to deposit a second releasing mask. A free part of the elastic metallic finger is released to eliminate a part of the releasing layer by employing the releasing window. The second mask serves as a mask of the finger which deposits a conducting coat substance on a cantilever tip portion even in succeeding directive deposit treatment. Next, the second mask is eliminated and a residual covering remaining on it is cut off. Completed elastic structure includes the conducting coat on upper surface and tip of the finger.
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公开(公告)号:JP2002343664A
公开(公告)日:2002-11-29
申请号:JP2002029410
申请日:2002-02-06
Applicant: XEROX CORP
Inventor: FORK DAVID K , MEI PING , SCHUYLENBERGH KOENRAAD F VAN
IPC: G03F7/20 , B81B1/00 , B81B3/00 , B81C1/00 , B81C3/00 , H01F17/00 , H01F17/02 , H01F27/00 , H01F41/04 , H01L21/48 , H01L21/60 , H01L23/522 , H01L27/08 , H05K3/40
Abstract: PROBLEM TO BE SOLVED: To provide several methods and structures for improving yield in a planar external microdevice structure including a spring and a coil. SOLUTION: A substrate 20 and at least two elastic members 18 arranged at intervals are provided, each elastic member 18 includes an anchor section, the spring, and a free-end section, and the anchor section is fixed onto the substrate 20. The free-end section is arranged apart from the substrate 20. Even though at first the free-end section and spring are fixed into the substrate, they are peeled off from the substrate, and become separated from the substrate. By the inherent stress profile of the elastic member 18, the free-end section is inclined for separating from the substrate 20, and the spring is formed.
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公开(公告)号:JP2002164214A
公开(公告)日:2002-06-07
申请号:JP2001290722
申请日:2001-09-25
Applicant: XEROX CORP
Inventor: VAN SCHUYLENBERGH KOENRAAD F , FORK DAVID K
Abstract: PROBLEM TO BE SOLVED: To obtain a high-performance inductor for an IC device that can be manufactured more easily. SOLUTION: After non-flush micro-coils (for example, inductors) 200, containing conductive traces are formed on a substrate 210, the traces are connected to each other by using a standard wire bonding technique. The conductive trace of each microcoil 200 contains first and second connection pads 237 and 252 provided at an interval and interconnecting wiring 240, which is extended long between the pads 237 and 252. Then a first wire 260 (1) is provided, so that the wire 260 (1) is extended from the first pad 237 to the first end section of the wiring 240 on the surface of the substrate 210. In addition, a second wire 260 (2) is provided, so that the wire 260 (2) is extended from the second pad 252 to the second end section of the wiring 240 on the surface of the substrate 210.
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公开(公告)号:JP2002162582A
公开(公告)日:2002-06-07
申请号:JP2001286787
申请日:2001-09-20
Applicant: XEROX CORP
Inventor: ROSA MICHEL A , PEETERS ERIC , FORK DAVID K
Abstract: PROBLEM TO BE SOLVED: To obtain an optical switch, using a reflection MEMS mirror. SOLUTION: An optical cross connector system involves the general concept of a two-dimensional array of MEMS tilt mirrors, used to direct light, coming from a first optical fiber to a second optical fiber. Each MEMS tilt mirror in the two-dimensional array can tilt about two non-colinear axes and is suspended by plural suspension arms attached to a substrate.
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