公开(公告)号：KR1020070059857A

公开(公告)日：2007-06-12

申请号：KR1020060050320

申请日：2006-06-05

Applicant: 한국전자통신연구원

Inventor： 김이경 ,  권종기 ,  김종대 ,  조민형 ,  이승철 ,  김규현

IPC: H03M3/04

CPC classification number: H03M3/50 ,  H03M2201/61 ,  H03M2201/6372 ,  H03M2201/8152

Abstract: A multi-bit sigma delta modulator with one DAC capacitor and a DAC(Digital-Analog Converter) for the multi-bit sigma delta modulator are provided to increase the number of output levels of the DAC by expanding the DAC capacitor. A multi-bit sigma delta modulator includes an operation amplifier(21), a sampling capacitor(22), an integration capacitor(23), a DAC capacitor(24), switches(25,26,27), and a switching controller(28). The sampling capacitor(22) is connected between the first switch(26) and an input terminal of the operation amplifier(21). The first switch(26) is connected between the input terminal of the operation amplifier(21) and a ground. The second switch(27) is connected between an input(IN) and the sampling capacitor(22). The integration capacitor(23) connects an output(OUT) and the input terminal of the operation amplifier(21) to form a negative feedback loop. The DAC capacitor(24) is connected between the DAC switch(25) and the input terminal of the operation amplifier(21). The DAC switch(25) connects reference voltages(Vrefp,Vcm,Vrefn) to the DAC capacitor(24) for a DAC of a switched capacitor structure to perform a desired operation. The switching controller(28) controls operation of the DAC switch(25) by generating a control signal according to an ADC output code of a modulator.

Abstract translation: 提供具有一个DAC电容器的多位Σ-Δ调制器和用于多位Σ-Δ调制器的DAC（数模转换器），以通过扩展DAC电容器来增加DAC的输出电平数量。 多位Σ-Δ调制器包括运算放大器（21），采样电容器（22），积分电容器（23），DAC电容器（24），开关（25,26,27）和开关控制器 28）。 采样电容器（22）连接在第一开关（26）和运算放大器（21）的输入端子之间。 第一开关（26）连接在运算放大器（21）的输入端和地之间。 第二开关（27）连接在输入（IN）和采样电容器（22）之间。 积分电容器（23）连接输出（OUT）和运算放大器（21）的输入端，以形成负反馈回路。 DAC电容器（24）连接在DAC开关（25）和运算放大器（21）的输入端子之间。 DAC开关（25）将用于开关电容器结构的DAC的参考电压（Vrefp，Vcm，Vrefn）连接到DAC电容器（24）以执行期望的操作。 开关控制器（28）通过根据调制器的ADC输出代码产生控制信号来控制DAC开关（25）的操作。

公开(公告)号：KR1020050077112A

公开(公告)日：2005-08-01

申请号：KR1020040004760

申请日：2004-01-26

Applicant: 엘지전자 주식회사

Inventor： 김준영

IPC: H03M1/34

CPC classification number: H03M1/18 ,  H03M1/1014 ,  H03M2201/61 ,  H03M2201/6345

Abstract: 본 발명은 디지털 기기에 관한 것으로, 특히 디지털 기기에서 AD 컨버터 기준 바이어스 설정 회로에 관한 것이다. 이와 같이 본 발명에 따른 디지털 기기에서 AD 컨버터 기준 바이어스 설정 회로는 디스플레이 기기의 아날로그 신호 양자화 과정 시 기준 바이어스 설정 장지에 있어서, A/D 컨버터 외부에 최소, 최대 바이어스 설정 회로를 더 포함하여 구성된다.

公开(公告)号：KR1020020017498A

公开(公告)日：2002-03-07

申请号：KR1020000050865

申请日：2000-08-30

Applicant: 에스케이하이닉스 주식회사

Inventor： 김동원

IPC: H03M1/66

CPC classification number: H03M1/70 ,  H03M1/745 ,  H03M2201/61

Abstract: PURPOSE: A current cell type digital-analog converter is provided to vary a range of an output voltage by controlling a load resistance of a current-voltage converter according to a logical value of an external control signal. CONSTITUTION: A current cell type digital-analog converter has a current-voltage converter(322) for generating a P channel current signal(IP) and an N channel current signal(IN) and converting the P channel current signal(IP) and the N channel current signal(IN) to a P channel analog voltage and an N channel analog voltage. The current-voltage converter(322) is formed with a decoder(318) and an analog voltage generation portion(320). The decoder decodes a control signal of 2 bits and generates a switching signal of 4 bits. The analog voltage generation portion(320) has the first load resistance(302a-302d) and the second load resistance(304a-304d). A common voltage node(306) is formed by the first load resistance(302a-302d), the second load resistance(304a-304d), the first transmission gate(308a-308d), and the second transmission gate(310a-310d).

Abstract translation: 目的：提供当前电池型数模转换器，通过根据外部控制信号的逻辑值控制电流 - 电压转换器的负载电阻来改变输出电压的范围。 构成：当前单元型数字模拟转换器具有用于产生P沟道电流信号（IP）和N沟道电流信号（IN）的电流 - 电压转换器（322）并且转换P沟道电流信号（IP）和 N通道电流信号（IN）为P通道模拟电压和N通道模拟电压。 电流 - 电压转换器（322）形成有解码器（318）和模拟电压产生部分（320）。 解码器对2位的控制信号进行解码，生成4位的切换信号。 模拟电压产生部分（320）具有第一负载电阻（302a-302d）和第二负载电阻（304a-304d）。 公共电压节点（306）由第一负载电阻（302a-302d），第二负载电阻（304a-304d），第一传输门（308a-308d）和第二传输门（310a-310d）形成， 。