Register context restoration based on rename register recovery

    公开(公告)号:GB2575412B

    公开(公告)日:2021-10-20

    申请号:GB201916132

    申请日:2018-03-13

    Applicant: IBM

    Abstract: A load request to restore a plurality of architected registers is obtained. Based on obtaining the load request, one or more architected registers of the plurality of architected registers are restored. The restoring uses a snapshot that maps architected registers to physical registers to replace one or more physical registers currently assigned to the one or more architected registers with one or more physical registers of the snapshot corresponding to the one or more architected registers.

    Caller protected stack return address in hardware managed stack architecture

    公开(公告)号:GB2562666B

    公开(公告)日:2021-08-25

    申请号:GB201812654

    申请日:2016-12-23

    Applicant: IBM

    Abstract: Corruption of program stacks is detected by using guard words placed in the program stacks. A called routine executing on a processor checks a guard word in a stack of a calling routine. The checking determines whether the guard word has an expected value. Based on determining the guard word has an unexpected value, an indication of corruption of the stack is provided. Some routines, however, may not support use of guard words. Thus, routines that are interlinked may have differing protection capabilities. A determination is made as to the differing protection capabilities, an indication of the same is provided, and the routines are executed without failing due to the differing protection capabilities.

    instrução para computar a distância para uma fronteira de memória específica

    公开(公告)号:BR112014022726A2

    公开(公告)日:2021-07-27

    申请号:BR112014022726

    申请日:2012-11-15

    Applicant: IBM

    Abstract: instrução para computar a distância para uma fronteira de memória específica. é fornecida uma instrução de contagem de carga para limite de bloco que fornece uma distância a partir de um endereço especificado de memória para um limite especificado de memória. o limite de memória é um limite que não deve ser cruzado durante o carregamento de dados. o limite pode ser especificado de várias maneiras, incluindo, mas não limitado a, um valor variável no texto de instrução, um valor de texto de instrução fixo codificado no código de operação ou um limite baseado em registro; ou pode ser dinamicamente determinado.

    Protecting in-memory configuration state registers

    公开(公告)号:GB2582097B

    公开(公告)日:2021-07-21

    申请号:GB202007893

    申请日:2018-11-02

    Applicant: IBM

    Abstract: Protecting in-memory configuration state registers. A request to access an in-memory configuration state register, such as a read or write request, is obtained. The in-memory configuration state register is mapped to memory. Error correction code of the memory is used to protect the access to the in-memory configuration state register.

    Configuration state registers grouped based on functional affinity

    公开(公告)号:GB2581938B

    公开(公告)日:2020-12-30

    申请号:GB202008653

    申请日:2018-11-02

    Applicant: IBM

    Abstract: Configuration state registers grouped based on functional affinity. An identification of an in-memory configuration state register for which memory is assigned is obtained. Based on the identification, an offset into the memory at which the in-memory configuration state register is stored is determined. The offset is allocated to the in-memory configuration state register based on functional affinity of the in-memory configuration state register. The in-memory configuration state register is accessed using at least the offset.

    Context switch by changing memory pointers

    公开(公告)号:GB2582095A

    公开(公告)日:2020-09-09

    申请号:GB202007823

    申请日:2018-11-02

    Applicant: IBM

    Abstract: Context switch by changing memory pointers. A determination is made that a context switch is to be performed from a first context to a second context. Data of the first context is stored in one or more configuration state registers stored at least in part in a first memory unit and data of the second context is stored in one or more configuration state registers stored at least in part in a second memory unit. The context switch is performed by changing a pointer from the first memory unit to the second memory unit.

    Set table of contents (TOC) register instruction

    公开(公告)号:GB2581639A

    公开(公告)日:2020-08-26

    申请号:GB202005423

    申请日:2018-09-18

    Applicant: IBM

    Abstract: A Set Table of Contents (TOC) Register instruction. An instruction to provide a pointer to a reference data structure, such as a TOC, is obtained by a processor and executed. The executing includes determining a value the pointer to the reference data structure, and storing the value in a location (e.g., a register) specified by the instruction.

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