公开(公告)号：DE10361714B4

公开(公告)日：2009-06-10

申请号：DE10361714

申请日：2003-12-30

Applicant: INFINEON TECHNOLOGIES AG

Inventor： PFIRSCH FRANK

IPC: H01L23/58 ,  H01L27/04 ,  H01L29/68 ,  H01L29/76 ,  H01L29/78 ,  H03K17/08 ,  H03K17/082

Abstract: Structural semiconductor element with entry/exit regions (S) and a control region (G), where its operating properties are controlled via an electrical potential difference between the control region and the first entry/exit region. A control resistance element (NTC) is in electrical contact with region G and the entry/exit region and element NTC have an operating temperature region in which the ohmic resistance decreases with increase in temperature of element NTC. An independent claim is included for an integrated semiconductor structure with a limiting resistance (RB) between control or gate region G and control resistance element NTC.

公开(公告)号：DE10325721B4

公开(公告)日：2009-02-05

申请号：DE10325721

申请日：2003-06-06

Applicant: INFINEON TECHNOLOGIES AG

Inventor： MILLER GERHARD JOHANN ,  PFIRSCH FRANK

IPC: H01L29/739 ,  H01L29/06 ,  H01L29/08 ,  H01L29/861

公开(公告)号：DE10245550B4

公开(公告)日：2007-08-16

申请号：DE10245550

申请日：2002-09-30

Applicant: INFINEON TECHNOLOGIES AG

Inventor： PFIRSCH FRANK

IPC: H01L29/06 ,  H01L29/739 ,  H01L29/78 ,  H01L29/872

Abstract: A compensation component, in which a lateral section and, at least at one end of the lateral section, a section that is inclined with respect to the surface of a drift path, includes n-conducting and p-conducting regions completely embedded in a semiconductor body without a trench. In such a case, the inclined section is formed by ion implantation through an implantation mask with an inclined edge.

公开(公告)号：DE102005023668B3

公开(公告)日：2006-11-09

申请号：DE102005023668

申请日：2005-05-23

Applicant: INFINEON TECHNOLOGIES AG

Inventor： PFIRSCH FRANK

IPC: H01L29/06 ,  H01L29/739 ,  H01L29/78

Abstract: Electrodes (2,3) are provided on opposite sides of the semiconductor body (4) having an n-type charge carrier area (8) and a p-type charge area (10) that form a pn junction. A middle region between the electrodes is surrounded by a boundary region comprised of a straight line edge section and a curved edge section. The breakdown voltage in the straight line section is smaller than the breakdown voltage in the curved edge section.

公开(公告)号：DE102004042758B4

公开(公告)日：2006-08-24

申请号：DE102004042758

申请日：2004-09-03

Applicant: INFINEON TECHNOLOGIES AG

Inventor： PFIRSCH FRANK

IPC: H01L29/861 ,  H01L29/78

Abstract: A semiconductor device (1, 20-80) has an emitter terminal (2), a collector terminal (3) and also a semiconductor body (4) provided between emitter terminal (2) and collector terminal (3). An emitter zone (5, 70) is formed in the semiconductor body (4), said emitter zone at least partially adjoining the emitter terminal (2) and also having a first interface (16) facing the emitter terminal (2) and a second interface (17) facing the collector terminal. The semiconductor device has at least one MOS structure (8, 81) which pervades the emitter zone or adjoins the latter, and which is configured such that corresponding MOS channels (11, 14) induced by the MOS structure (8, 81) within the emitter zone (5, 70) are at a distance from the first interface (16) of the emitter zone (5, 70).

公开(公告)号：DE102004024344A1

公开(公告)日：2005-12-22

申请号：DE102004024344

申请日：2004-05-17

Applicant: INFINEON TECHNOLOGIES AG

Inventor： PFIRSCH FRANK

IPC: H01L21/329 ,  H01L21/336 ,  H01L21/762 ,  H01L29/06 ,  H01L29/10 ,  H01L29/78 ,  H01L29/872

Abstract: To make the drift zone (34) and layers (32) penetrating it, A layer structure is first formed. This contains material (32) of greater dielectric constant and also recesses (33) on a substrate (30) or on layers provided on it (30). The drift zone is formed by filling (at least in part) the recesses (33) in the layer structure with semiconductor material. An independent claim is included for the corresponding power semiconductor component.

公开(公告)号：DE50107925D1

公开(公告)日：2005-12-08

申请号：DE50107925

申请日：2001-08-24

Applicant: EUPEC GMBH & CO KG ,  INFINEON TECHNOLOGIES AG

Inventor： BARTHELMESS REINER ,  PFIRSCH FRANK ,  MAUDER ANTON ,  SCHMIDT GERHARD

IPC: H01L21/322 ,  H01L21/329 ,  H01L29/06 ,  H01L29/40 ,  H01L29/861 ,  H01L21/304

公开(公告)号：DE19960563B4

公开(公告)日：2005-11-03

申请号：DE19960563

申请日：1999-12-15

Applicant: INFINEON TECHNOLOGIES AG

Inventor： PFIRSCH FRANK ,  LASKA THOMAS

IPC: H01L21/334 ,  H01L27/08 ,  H01L21/822

公开(公告)号：DE10361136A1

公开(公告)日：2005-07-21

申请号：DE10361136

申请日：2003-12-23

Applicant: INFINEON TECHNOLOGIES AG

Inventor： MAUDER ANTON ,  SCHULZE HANS-JOACHIM ,  PFIRSCH FRANK ,  FALCK ELMAR ,  LUTZ JOSEF

IPC: H01L29/08 ,  H01L29/739 ,  H01L29/861 ,  H01L29/06

Abstract: Between semiconductor diode (1) anode (2) and cathode (3) is fitted semiconductor volume (7), in which are formed several semiconductor zones (81-4), inversely doped with respect to their direct environment, mutually spaced apart, located near to, but spaced from cathode.Preferably semiconductor volume contains three semiconductor layers (4-6), fitted in this order on cathode. First layer is N+/-doped, second N=doped and third is P-doped, with semiconductor zoned formed within second layer(s). Independent claims are included for IGBT and semiconductor component.

公开(公告)号：DE10355669A1

公开(公告)日：2005-06-30

申请号：DE10355669

申请日：2003-11-28

Applicant: INFINEON TECHNOLOGIES AG

Inventor： WERNER WOLFGANG ,  PFIRSCH FRANK

IPC: H01L29/49 ,  H01L29/78

Abstract: The transistor has a drift zone (22) and a source zone (40), and a channel zone (30) arranged between the drift and source zones such that a gate electrode (50) having a temperature range is isolated from the channel zone. A conducting channel is formed at the gate electrode based on an electron affinity difference in the channel zone, to avoid drop of threshold voltage of the electrode during rise in temperature.