公开(公告)号：BR9911603A

公开(公告)日：2001-02-06

申请号：BR9911603

申请日：1999-05-28

Applicant: INFINEON TECHNOLOGIES AG

Inventor： ALLINGER ROBERT ,  HOLLFELDER ROBERT ,  POCKRANDT WOLFGANG ,  WEDEL ARMIN

IPC: G07F7/10 ,  H03K21/40

Abstract: A method of operating a multistage counter in only one counting direction includes the step of changing a counter reading of a single-stage auxiliary counter at given counter readings of the multistage counter. The single-stage auxiliary counter and the multistage counter can only be changed in one counting direction. Respective counter readings of the multistage counter and of the single-stage auxiliary counter are registered. Values of the respective counter readings of the single-stage auxiliary counter and of the multistage counter are compared with one another, and an indicator signal is generated based on a comparison result determined in the comparing step.

公开(公告)号：BR9810890A

公开(公告)日：2000-09-26

申请号：BR9810890

申请日：1998-07-14

Applicant: INFINEON TECHNOLOGIES AG

Inventor： POCKRANDT WOLFGANG ,  SEDLAK HOLGER ,  VIEHMANN HANS-HEINRICH

IPC: G11C16/04 ,  G11C16/06

Abstract: The invention relates to a semiconductor memory having a non-volatile two-transistor memory cell which has an N-channel selection transistor and an N-channel memory transistor. The drive circuitry for the cell includes a P-channel transfer transistor. A transfer channel is connected to a row line leading to the memory cell. This enables the voltages required for programming to be obtained with relatively little technological complexity.