56.
    发明专利
    未知

    公开(公告)号:IT1241050B

    公开(公告)日:1993-12-29

    申请号:IT660990

    申请日:1990-04-20

    Abstract: The invention relates to a process for forming a buried drain or collector region in monolithic semiconductor devices comprising an integrated control circuit and one or more power transistors with vertical current flow integrated in the same chip. The process allows optimization of the current-carrying capacity and the series drain resistance of the power stage and operating voltage in comparison with known structures by provision of one or more regions of high dopant concentration defined after growth of a first epitaxial layer.

    60.
    发明专利
    未知

    公开(公告)号:DE69330556D1

    公开(公告)日:2001-09-13

    申请号:DE69330556

    申请日:1993-05-13

    Abstract: An integrated structure protection circuit suitable for protecting a power device (M) against overvoltages comprises a plurality of serially connected junction diodes (D1-D5), each having a first electrode, represented by a highly doped region (1) of a first conductivity type, and a second electrode represented by a medium doped or low doped region (2) of a second conductivity type. A first diode (D1) of said plurality has its first electrode (1) connected to a gate layer (5) of said power device (M) and its second electrode (2) connected to the second electrode (2) of at least one second diode (D2-D5) of said plurality, and said at least one second diode has its first electrode (1) connected to a drain region of the power device (M). The doping level of the second electrode (2) of the diodes (D1-D5) of said plurality is suitable to achieve sufficiently high breakdown voltage values.

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