公开(公告)号：US20250149325A1

公开(公告)日：2025-05-08

申请号：US19014870

申请日：2025-01-09

Applicant: ASM IP Holding B.V.

Inventor： Shaoren Deng ,  Andrea Illiberi ,  Daniele Chiappe ,  Eva Tois ,  Giuseppe Alessio Verni ,  Michael Givens ,  Varun Sharma ,  Chiyu Zhu ,  Shinya Iwashita ,  Charles Dezelah ,  Viraj Madhiwala ,  Jan Willem Maes ,  Marko Tuominen ,  Anirudhan Chandrasekaran

IPC: H01L21/02 ,  B08B3/08 ,  B08B5/00 ,  C11D7/02 ,  C11D7/24 ,  C11D7/26 ,  C23C16/02 ,  H01L21/285

Abstract: Methods for cleaning a substrate are disclosed. The substrate comprises a dielectric surface and a metal surface. The methods comprise providing a cleaning agent to the reaction chamber.

公开(公告)号：US20250109491A1

公开(公告)日：2025-04-03

申请号：US18900571

申请日：2024-09-27

Applicant: ASM IP Holding B.V.

Inventor： Eric James Shero ,  Marko Tuominen ,  Saima Ali ,  Bhagyesh Purohit ,  Eva E. Tois ,  Kizysztof Kamil Kachel ,  Adam Vianna ,  Vincent Vandalon ,  Charles Dezelah

IPC: C23C16/04

Abstract: The disclosure relates to methods, processing assemblies, reactants and vapor deposition vessels for selective vapor-phase deposition of inhibitor material on a substrate comprising two surfaces. In some embodiments of the disclosure, the inhibition material is deposited on the first surface of the substrate, whereas substantially no inhibitor material is deposited on the second surface of the substrate. The inhibitor material is formed by contacting the substrate with a vapor-phase inhibitor reactant comprising a silicon atom bonded to an oxygen atom and to a second atom selected from nitrogen and halogens.

公开(公告)号：US20250092515A1

公开(公告)日：2025-03-20

申请号：US18967466

申请日：2024-12-03

Applicant: ASM IP Holding B.V.

Inventor： Viraj Madhiwala ,  Daniele Chiappe ,  Eva Tois ,  Marko Tuominen ,  Charles Dezelah ,  Shaoren Deng ,  Anirudhan Chandrasekaran ,  YongGyu Han ,  Michael Givens ,  Andrea llliberi ,  Vencent Vandalon

IPC: C23C16/40 ,  C23C16/455 ,  H01J37/32

Abstract: Methods and vapor deposition assemblies of selectively depositing material comprising silicon and oxygen on a first surface of a substrate relative to a second surface of the substrate by a cyclic deposition process are disclosed. The methods comprise providing a substrate into a reaction chamber, providing a metal or metalloid catalyst into the reaction chamber in a vapor phase, providing a silicon precursor comprising an alkoxy silane compound into the reaction chamber in a vapor phase and providing a plasma into the reaction chamber to form a reactive species for forming a material comprising silicon and oxygen on the first surface. The methods may comprise subcycles for, for example, adjusting the proportions of material components.

公开(公告)号：US20250092510A1

公开(公告)日：2025-03-20

申请号：US18889140

申请日：2024-09-18

Applicant: ASM IP Holding B.V.

Inventor： Bhagyesh Purohit ,  Saima Ali ,  Eva E. Tois ,  Marko Tuominen ,  Charles Dezelah

IPC: C23C16/04 ,  C23C16/455

Abstract: The disclosure relates to methods, processing assemblies, for selective vapor-phase deposition of inhibitor material on a substrate comprising two surfaces. In some embodiments of the disclosure, the inhibition material is deposited on the first conductive surface of the substrate, whereas substantially no inhibitor material is deposited on the second surface of the substrate. The inhibitor material is formed by contacting the substrate with a vapor-phase inhibitor reactant comprising alkylsilane having at least one alkoxy group bonded to a silicon atom.

公开(公告)号：US20250069885A1

公开(公告)日：2025-02-27

申请号：US18946444

申请日：2024-11-13

Applicant: ASM IP Holding B.V.

Inventor： Eva E. Tois ,  Suvi P. Haukka ,  Raija H. Matero ,  Elina Färm ,  Delphine Longrie ,  Hidemi Suemori ,  Jan Willem Maes ,  Marko Tuominen ,  Shaoren Deng ,  Ivo Johannes Raaijmakers ,  Andrea Illiberi

IPC: H01L21/02 ,  H01L21/027 ,  H01L21/3105 ,  H01L21/311 ,  H01L21/32 ,  H01L21/321 ,  H01L21/56 ,  H01L21/67 ,  H01L21/768 ,  H01L23/31 ,  H01L23/522 ,  H01L23/528 ,  H01L23/532

Abstract: Methods for selective deposition, and structures thereof, are provided. Material is selectively deposited on a first surface of a substrate relative to a second surface of a different material composition. A passivation layer is selectively formed from vapor phase reactants on the first surface while leaving the second surface without the passivation layer. A layer of interest is selectively deposited from vapor phase reactants on the second surface relative to the passivation layer. The first surface can be metallic while the second surface is dielectric, or the second surface is dielectric while the second surface is metallic. Accordingly, material, such as a dielectric, can be selectively deposited on either metallic or dielectric surfaces relative to the other type of surface using techniques described herein. Techniques and resultant structures are also disclosed for control of positioning and shape of layer edges relative to boundaries between underlying disparate materials.

公开(公告)号：US20250037988A1

公开(公告)日：2025-01-30

申请号：US18914437

申请日：2024-10-14

Applicant: ASM IP Holding B.V.

Inventor： Varun Sharma ,  Daniele Chiappe ,  Eva Tois ,  Viraj Madhiwala ,  Marko Tuominen ,  Charles Dezelah ,  Michael Givens ,  Tom Blomberg

IPC: H01L21/02

Abstract: The current disclosure relates to methods of depositing silicon oxide on a substrate, methods of forming a semiconductor device and a method of forming a structure. The method comprises providing a substrate in a reaction chamber, providing a silicon precursor in the reaction chamber, the silicon precursor comprising a silicon atom connected to at least one oxygen atom, the at least one oxygen atom being connected to a carbon atom, and providing a reactant comprising hydrogen atoms in the reaction chamber to form silicon oxide on the substrate.

公开(公告)号：US12170197B2

公开(公告)日：2024-12-17

申请号：US17388773

申请日：2021-07-29

Applicant: ASM IP HOLDING B.V.

Inventor： Eva E. Tois ,  Suvi P. Haukka ,  Raija H. Matero ,  Elina Färm ,  Delphine Longrie ,  Hidemi Suemori ,  Jan Willem Maes ,  Marko Tuominen ,  Shaoren Deng ,  Ivo Johannes Raaijmakers ,  Andrea Illiberi

IPC: H01L21/02 ,  H01L21/027 ,  H01L21/3105 ,  H01L21/311 ,  H01L21/32 ,  H01L21/321 ,  H01L21/56 ,  H01L21/67 ,  H01L21/768 ,  H01L23/31 ,  H01L23/522 ,  H01L23/528 ,  H01L23/532

Abstract: Methods for selective deposition, and structures thereof, are provided. Material is selectively deposited on a first surface of a substrate relative to a second surface of a different material composition. A passivation layer is selectively formed from vapor phase reactants on the first surface while leaving the second surface without the passivation layer. A layer of interest is selectively deposited from vapor phase reactants on the second surface relative to the passivation layer. The first surface can be metallic while the second surface is dielectric, or the second surface is dielectric while the second surface is metallic. Accordingly, material, such as a dielectric, can be selectively deposited on either metallic or dielectric surfaces relative to the other type of surface using techniques described herein. Techniques and resultant structures are also disclosed for control of positioning and shape of layer edges relative to boundaries between underlying disparate materials.

公开(公告)号：US20240282572A1

公开(公告)日：2024-08-22

申请号：US18441148

申请日：2024-02-14

Applicant: ASM IP Holding B.V.

Inventor： Viraj Madhiwala ,  Vincent Vandalon ,  Nadadur Veeraraghavan Srinath ,  Eva Tois ,  Shaoren Deng ,  Daniele Chiappe ,  Marko Tuominen ,  Charles Dezelah ,  YongGyu Han ,  Kranthi Kumar Vaidyula ,  Glen Wilk ,  David Zanders ,  Aranzazu Maestre Caro

IPC: H01L21/02 ,  C23C16/04 ,  C23C16/40 ,  C23C16/455

CPC classification number: H01L21/02205 ,  C23C16/04 ,  C23C16/40 ,  C23C16/403 ,  C23C16/405 ,  C23C16/45527 ,  C23C16/45544 ,  H01L21/02175 ,  H01L21/02181 ,  H01L21/02189 ,  H01L21/02192 ,  H01L21/0228

Abstract: The disclosure relates to methods and processing assemblies selectively depositing metal oxide by cyclic vapor deposition techniques. Such methods may be used for, for example, processing semiconductor substrates. More particularly, the disclosure relates to methods and assemblies for selectively depositing a metal oxide layer. Various embodiments of the current disclosure relate to selective deposition of metal oxide layers, such as dielectric layers, etch stop layers and threshold voltage shifting layers. In particular, the disclosure relates to the deposition of metal oxide layers, such as yttrium oxide (Y2O3), and doped metal oxide layers, such as yttrium-doped aluminum oxide (AlYOx) by cyclic vapor deposition processes.

公开(公告)号：US20240222111A1

公开(公告)日：2024-07-04

申请号：US18396357

申请日：2023-12-26

Applicant: ASM IP Holding B.V.

Inventor： Viraj Madhiwala ,  Eva E. Tois ,  Daniele Chiappe ,  Marko Tuominen

IPC: H01L21/02

CPC classification number: H01L21/0228 ,  H01L21/02046 ,  H01L21/0206 ,  H01L21/02178 ,  H01L21/02205 ,  H01L21/02304 ,  H01L21/02312

Abstract: Methods for selectively forming a dielectric layer on a metallic surface relative to a dielectric surface are disclosed. The disclosed selective formation methods include selective passivation processes, and selective deposition processes.

公开(公告)号：US20240026548A1

公开(公告)日：2024-01-25

申请号：US18349444

申请日：2023-07-10

Applicant: ASM IP HOLDING B.V.

Inventor： Tom E. Blomberg ,  Varun Sharma ,  Suvi Haukka ,  Marko Tuominen ,  Chiyu Zhu

IPC: C23F4/02 ,  C23F1/12 ,  H01L21/3213 ,  C09K13/00 ,  H01L21/311 ,  C09K13/08 ,  C09K13/10 ,  H01J37/32 ,  H01L21/3065

CPC classification number: C23F4/02 ,  C23F1/12 ,  H01L21/32135 ,  C09K13/00 ,  H01L21/31122 ,  C09K13/08 ,  C09K13/10 ,  H01J37/32009 ,  H01J37/3244 ,  H01L21/3065 ,  H01L21/31116 ,  H01L21/31138

Abstract: Thermal atomic layer etching processes are disclosed. In some embodiments, the methods comprise at least one etch cycle in which the substrate is alternately and sequentially exposed to a first vapor phase halide reactant and a second vapor halide reactant. In some embodiments, the first reactant may comprise an organic halide compound. During the thermal ALE cycle, the substrate is not contacted with a plasma reactant.