71.
    发明专利
    未知

    公开(公告)号:AT376254T

    公开(公告)日:2007-11-15

    申请号:AT00900602

    申请日:2000-01-18

    Applicant: AXALTO SA

    Abstract: This invention relates to an integrated circuit device, in particular for manufacturing smart card electronic units for smart cards. It comprises: an active layer ( 32 ) including a semiconductor material within which integrated circuits are formed and having a face ( 34 ) provided with a plurality of electrical connection terminals ( 36 ) and a second face, wherein said face has a thickness smaller than 100 mum, and a complementary layer ( 40 ) having a first face ( 42 ) attached to the active face of the active layer, a second face ( 44 ) and a side surface ( 48 ), wherein said complementary layer includes a plurality of recesses ( 46 ), each recess extending through the whole thickness of the complementary layer, and extending from a contact terminal ( 36 ) to said side surface ( 48 ).

    72.
    发明专利
    未知

    公开(公告)号:DE60213632T2

    公开(公告)日:2007-10-18

    申请号:DE60213632

    申请日:2002-10-10

    Applicant: AXALTO SA

    Abstract: This invention concerns a smartcard (CAR), wherein it comprises at least one module (TIM) external to the operating system to manage the triggering of byte transmission. The external module (TIM) acts as assistant by monitoring the operating system. In its role as assistant, it can force the operating system to trigger byte transmission. Consequently, the inter-byte time intervals are better respected so that the reader can communicate with the smartcard. When these time intervals are not respected, the reader fails to recognise the card. The invention therefore avoids ejection of the card.

    PROCEDE ET DISPOSITIF DE GENERATION D'UN NOMBRE ALEATOIRE DANS UN PERIPHERIQUE USB

    公开(公告)号:FR2896057A1

    公开(公告)日:2007-07-13

    申请号:FR0600251

    申请日:2006-01-12

    Abstract: L'invention concerne un procédé de génération d'un nombre aléatoire, comprenant des étapes de réception d'un signal binaire (RxD) de transmission de données soumis à une fluctuation de phase, de génération de plusieurs signaux d'oscillateur (P0-P7) sensiblement de même fréquence moyenne et ayant des phases respectives distinctes, de prélèvement d'un état (S0-S7) de chacun des signaux d'oscillateur à l'apparition de fronts du signal binaire (RxD), et d'élaboration d'un nombre aléatoire (RND) à partir des états de chacun des signaux d'oscillateur. Application à un circuit intégré utilisable dans une carte à puce.

    75.
    发明专利
    未知

    公开(公告)号:DE60219076D1

    公开(公告)日:2007-05-03

    申请号:DE60219076

    申请日:2002-12-12

    Applicant: AXALTO SA

    Abstract: A system comprising a first communication device and a second communication device, the first communication device being arranged to communicate with the second communication device via a communication network using a first communication protocol, the first communication device being arranged to send a message to the second communication device via the communication network using the first communication protocol, the message being designed for a second communication protocol, wherein the second communication device is arranged to send the message to a third communication device, the third communication device being arranged to understand the second communication protocol.

    76.
    发明专利
    未知

    公开(公告)号:DE69602930T3

    公开(公告)日:2006-12-21

    申请号:DE69602930

    申请日:1996-03-27

    Applicant: AXALTO SA

    Inventor: THIRIET FABIEN

    Abstract: For a memory card that includes memory blocks containing reliability parameters (P1, P2, and P3) and respective reliability weights (PF1, PF2, and PF3), for the parameters, the method comprises the following steps: determining the reliability weights corresponding to the access request; computing an interactive reliability weight (PFI) as a function of the respective reliability weights of the access request; comparing the interactive reliability weight with an access reliability index (FA); and authorizing or refusing access to the application as a function of the results of the comparison.

    77.
    发明专利
    未知

    公开(公告)号:AT347708T

    公开(公告)日:2006-12-15

    申请号:AT97400088

    申请日:1997-01-16

    Applicant: AXALTO SA

    Inventor: THIRIET FABIEN

    Abstract: A central processor unit (1) has a memory with zones (3,4). In a first memory zone (3), a series of executable functions are stored directly by the central unit (1). The first zone (3) is protected. The program is stored in a second memory zone (4) in the form of a series of instructions executable by the CPU, or the function contained in the first memory zone (3) is activated. The functions of the first zone of memory are executable at pre-determined addresses and besides activation of the functions of the first memory zone, the instructions of the second memory zone are exclusively executable in the second memory zone.

    78.
    发明专利
    未知

    公开(公告)号:DE60025509T2

    公开(公告)日:2006-09-07

    申请号:DE60025509

    申请日:2000-10-17

    Applicant: AXALTO SA

    Abstract: The invention concerns a method to authenticate the result of executing a command in a token connected to a terminal, the terminal including a communication device to send information to a user of the token, the token transmitting a result to the terminal following the execution. The invention is characterized in that the method includes the steps according to which:a check is carried out to find out whether the command has a sensitive nature, if the command has a sensitive nature, the following steps are carried out, according to which:for any sensitive potential results of the command, at least one item of digitizable information is input via an interface including an input device connected to the token, and the item of digitizable information is transmitted to the token.

    79.
    发明专利
    未知

    公开(公告)号:FI117216B

    公开(公告)日:2006-07-31

    申请号:FI970641

    申请日:1997-02-14

    Applicant: AXALTO SA

    Inventor: RHELIMI ALAIN

    Abstract: PCT No. PCT/FR95/01061 Sec. 371 Date Apr. 23, 1997 Sec. 102(e) Date Apr. 23, 1997 PCT Filed Aug. 8, 1995 PCT Pub. No. WO96/05548 PCT Pub. Date Feb. 22, 1996The invention relates to protected keypad apparatus, in particular for machines actuated by insertion of an electronic smart card. The keypad proper (10) comprises n sensitive zones (Zi), each sensitive zone being associated with a respective sensor and with an individual processing circuit (14i) that includes in particular an encryption function. The sensor and the circuit form a monolithic unit. The apparatus further includes a driver unit (18) connected to each circuit (14i) via a bus (16). The circuits periodically and cyclically transmit encrypted signals indicating activation or non-activation of the sensitive zones.

    80.
    发明专利
    未知

    公开(公告)号:DE60211332D1

    公开(公告)日:2006-06-14

    申请号:DE60211332

    申请日:2002-05-15

    Applicant: AXALTO SA

    Abstract: The invention concerns a procedure for management of "cookie" type data by means of an on-board system, for example a chip card (2a, 20a), providing "web" client-server functions. The chip card (2a, 20a) is integrated in a host terminal (1), and exchanges data with remote HTTP servers (4) via the Internet network (RI). In a preferred practical form, the cookies are stored in a cache memory (70) on the chip card (2a, 20a), and are controlled by a data processing device (8) on this card. The invention also concerns a silicon chip on-board system (2a, 20a) for implementation of the procedure.

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