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公开(公告)号：KR1020070062085A
公开(公告)日：2007-06-15
申请号：KR1020050121791
申请日：2005-12-12
Applicant: 삼성전자주식회사
CPC classification number: G01R31/2896 , G01R1/0433 , H01L22/30
Abstract: A semiconductor package insert is provided to support a semiconductor package regardless of the size of a support area formed along the lower periphery of the semiconductor package, by propping up the underside of a semiconductor between external connection terminals of the semiconductor package, with a package support unit having a through-hole. A semiconductor package insert(100) for containing a semiconductor package having external connection terminals at the underside is composed of an insert body(110) having a pocket formed in the center to receive the semiconductor package and a package support unit(150) protruded from the lower side of the pocket toward the inside thereof, to prop up the underside of the semiconductor package contained in the pocket. The package support unit has through-holes(156) formed on parts corresponding to each external connection terminal to receive the external connection terminals.
Abstract translation: 提供半导体封装插件以支持半导体封装，而不管沿着半导体封装的下周边形成的支撑区域的大小，通过将半导体封装的外部连接端子之间的半导体的下侧与封装支撑件 具有通孔的单元。 一种用于容纳在下侧具有外部连接端子的半导体封装件的半导体封装插件（100）由插入体（110）组成，所述插入体（110）具有形成在中心的凹部以容纳半导体封装，以及封装支撑单元（150），其从 袋的下侧朝向其内侧，以支撑容纳在口袋中的半导体封装的下侧。 包装支撑单元具有形成在与每个外部连接端子相对应的部分上的通孔（156），以接收外部连接端子。
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Patent Agency Ranking
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公开(公告)号：KR1020040025191A
公开(公告)日：2004-03-24
申请号：KR1020020057037
申请日：2002-09-18
Applicant: 삼성전자주식회사
Abstract: PURPOSE: A tray for test handler is provided to minimize the loss and prevent the damage of sockets by picking a semiconductor device located on a correct position. CONSTITUTION: A tray for test handler includes a body(110) and an anti-pickup unit. The body(110) includes a plurality of pockets(112) for storing a semiconductor device. The anti-pickup unit prevents an operation for picking up the semiconductor device located on an incorrect position in a process for picking up the semiconductor device stored within the pockets(112). The anti-pickup unit includes a plate(120). The plate(120) includes openings(122) to pass the semiconductor device located on a correct position.
Abstract translation: 目的：提供用于测试处理器的托盘，以最小化损耗，并通过拾取位于正确位置的半导体器件来防止插座损坏。 构成：用于测试处理器的托盘包括主体（110）和反拾取单元。 主体（110）包括用于存储半导体器件的多个凹穴（112）。 反拾取单元防止在用于拾取存储在凹穴（112）内的半导体器件的处理中拾取位于不正确位置的半导体器件的操作。 防拾取单元包括板（120）。 板（120）包括使位于正确位置的半导体器件通过的开口（122）。
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公开(公告)号：KR1020040006439A
公开(公告)日：2004-01-24
申请号：KR1020020040720
申请日：2002-07-12
Applicant: 삼성전자주식회사
Abstract: PURPOSE: An arrangement block of a test handler is provided to stably and accurately pick up a semiconductor device and to alleviate the damage transmitted to the semiconductor device during the picking process. CONSTITUTION: An arrangement block of a test handler includes a block(124) and an alleviation member(130). The arrange block(124) of the test handler is used for arranging the position of the semiconductor devices. The block(124) includes a plurality of pockets(122) for receiving the semiconductor devices(d). And, the alleviation member(130) alleviates the load applied to the semiconductor devices(d) during the process for picking up the semiconductor devices(d) received in the plurality of pockets(122).
Abstract translation: 目的：提供一种测试处理器的布置块，用于稳定且准确地拾取半导体器件，并减轻在拣选过程中传输到半导体器件的损坏。 构成：测试处理器的布置块包括块（124）和缓解构件（130）。 测试处理器的排列块（124）用于布置半导体器件的位置。 块（124）包括用于接收半导体器件（d）的多个凹穴（122）。 并且，减轻构件（130）减轻了在拾取多个凹穴（122）中容纳的半导体器件（d）的处理期间施加到半导体器件（d）的负载。
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