ETCH PROCESS AND A PROCESSING ASSEMBLY
    75.
    发明公开

    公开(公告)号:US20230170221A1

    公开(公告)日:2023-06-01

    申请号:US18056169

    申请日:2022-11-16

    CPC classification number: H01L21/30621

    Abstract: The current disclosure relates to a method of etching etchable material from a semiconductor substrate is disclosed. Th method comprises providing a substrate comprising the etchable material into a reaction chamber and providing a haloalkylamine into the reaction chamber in vapor phase for etching the etchable material. The disclosure further relates to a semiconductor processing assembly, and to a method of cleaning a reaction chamber.

    METHOD OF FORMING STRUCTURES INCLUDING A VANADIUM OR INDIUM LAYER

    公开(公告)号:US20230078233A1

    公开(公告)日:2023-03-16

    申请号:US17989081

    申请日:2022-11-17

    Abstract: Methods and systems for depositing vanadium and/or indium layers onto a surface of a substrate and structures and devices formed using the methods are disclosed. An exemplary method includes using a cyclical deposition process, depositing a vanadium and/or indium layer onto the surface of the substrate. The cyclical deposition process can include providing a vanadium and/or indium precursor to the reaction chamber and separately providing a reactant to the reaction chamber. The cyclical deposition process may desirably be a thermal cyclical deposition process. Exemplary structures can include field effect transistor structures, such as gate all around structures. The vanadium and/or indium layers can be used, for example, as barrier layers or liners, as work function layers, as dipole shifter layers, or the like.

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