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    RADIO FREQUENCY SWITCH FOR DIVERSITY RECEIVER
    73.
    发明申请
    RADIO FREQUENCY SWITCH FOR DIVERSITY RECEIVER 审中-公开
    无线电频率开关用于多样性接收机

    公开(公告)号：WO2013166486A1

    公开(公告)日：2013-11-07

    申请号：PCT/US2013/039681

    申请日：2013-05-06

    Applicant: QUALCOMM INCORPORATED

    Inventor： ZUO, Chengjie ,  YUN, Changhan ,  LO, Chi Shun ,  VELEZ, Mario F. ,  KIM, Jonghae

    IPC: H04B1/00 ,  H03K17/00 ,  H04B7/08

    CPC classification number: H04B7/0805 ,  H04B1/005 ,  H04B1/16 ,  H04B1/18 ,  H04B7/0825

    Abstract: A diversity receiver switch includes at least one second stage switch configured to communicate with a transceiver. The diversity receiver switch may also include at least one first stage switch coupled between a diversity receiver antenna and the second stage switch(es). The first stage switch(es) may be configured to handle a different amount of power than the second stage switch(es). The diversity receiver switch may include a bank of second stage switches configured to communicate with a transceiver. A first stage switch may be configured to handle more power than each switch in the bank of second stage switches. Alternatively, the diversity receiver switch include a bank of first stage switches coupled between the diversity receiver antenna and a second stage switch. The second stage switch may be configured to handle more power than each of the first stage switches.

    Abstract translation: 分集接收机交换机包括被配置为与收发机通信的至少一个第二级交换机。 分集接收机交换机还可以包括耦合在分集接收机天线和第二级交换机之间的至少一个第一级交换机。 第一级开关可以被配置为处理与第二级开关不同的功率量。 分集接收器开关可以包括被配置为与收发器通信的一组第二级交换机。 第一级开关可以被配置为处理比第二级开关组中的每个开关更多的功率。 或者，分集接收器开关包括耦合在分集接收器天线和第二级开关之间的一组第一级开关。 第二级开关可以被配置为处理比每个第一级开关更多的功率。

    METAL- SEMICONDUCTOR WAFER BONDING FOR HIGH-Q CAPACITORS
    74.
    发明申请
    METAL- SEMICONDUCTOR WAFER BONDING FOR HIGH-Q CAPACITORS 审中-公开
    金属半导体与高Q电容器的结合

    公开(公告)号：WO2013071178A1

    公开(公告)日：2013-05-16

    申请号：PCT/US2012/064539

    申请日：2012-11-09

    Applicant: QUALCOMM INCORPORATED

    Inventor： YUN, Changhan ,  ZUO, Chengjie ,  LO, Chi Shun ,  KIM, Jonghae ,  VELEZ, Mario F.

    IPC: H01G4/33 ,  H01L49/02 ,  H01L21/02 ,  H01L21/20

    CPC classification number: H01L29/66174 ,  H01G4/1272 ,  H01G4/33 ,  H01L28/40 ,  H01L28/75

    Abstract: A method for metal semiconductor wafer bonding for high-Q capacitors or varactors is provided. An exemplary capacitor (210) includes a first plate (310) formed on a glass substrate (305), a second plate (330), and a dielectric layer (315). No organic bonding agent is used between the first plate and the glass substrate, and the dielectric layer can be an intrinsic semiconductor. A extrinsic semiconductor layer (325) that is heavily doped contacts the dielectric layer. The dielectric and extrinsic semiconductor layers are sandwiched between the first and second plates. An intermetallic layer is formed between the first plate and the dielectric layer. The intermetallic layer comprising an alloy of the materials of the first plate and the dielectric layer is thermo compression bonded to the first plate and the dielectric layer.

    Abstract translation: 提供了一种用于高Q电容器或变容二极管的金属半导体晶片接合的方法。 示例性电容器（210）包括形成在玻璃基板（305）上的第一板（310），第二板（330）和介电层（315）。 在第一板和玻璃基板之间不使用有机粘合剂，并且电介质层可以是本征半导体。 重掺杂的非本征半导体层（325）接触电介质层。 电介质和非本征半导体层夹在第一和第二板之间。 在第一板和电介质层之间形成金属间层。 包含第一板和电介质层的材料的合金的金属间层被热压接合到第一板和电介质层。

    METHOD AND APPARATUS FOR LOAD-BASED PREFETCH ACCESS
    75.
    发明申请
    METHOD AND APPARATUS FOR LOAD-BASED PREFETCH ACCESS 审中-公开
    用于基于负载的预选访问的方法和装置

    公开(公告)号：WO2013033663A1

    公开(公告)日：2013-03-07

    申请号：PCT/US2012/053559

    申请日：2012-08-31

    Applicant: QUALCOMM INCORPORATED ,  WANG, Feng ,  KIM, Jonghae

    Inventor： WANG, Feng ,  KIM, Jonghae

    IPC: G06F13/16

    CPC classification number: G06F13/161 ,  G06F13/1652 ,  Y02D10/14

    Abstract: A load state of a slave memory is detected and provided to a master device. The master device communicates prefetch access requests to the slave memory based, at least in part, on the detected load state. Optionally, the master device communicates prefetch requests to the slave memory according to a schedule based, at least in part, on the detected load state.

    Abstract translation: 从存储器的负载状态被检测并提供给主设备。 至少部分地基于检测到的负载状态，主设备将预取访问请求传送到从属存储器。 可选地，主设备至少部分地基于检测到的负载状态，根据调度将预取请求传送到从存储器。

    THROUGH VIA INDUCTOR OR TRANSFORMER IN A HIGH-RESISTANCE SUBSTRATE WITH PROGRAMMABILITY
    76.
    发明申请
    THROUGH VIA INDUCTOR OR TRANSFORMER IN A HIGH-RESISTANCE SUBSTRATE WITH PROGRAMMABILITY 审中-公开
    通过具有可编程性的高电阻基板通过电感器或变压器

    公开(公告)号：WO2011153162A1

    公开(公告)日：2011-12-08

    申请号：PCT/US2011/038604

    申请日：2011-05-31

    Applicant: QUALCOMM INCORPORATED ,  LI, Xia ,  KIM, Jonghae ,  LO, Chi Shun

    Inventor： LI, Xia ,  KIM, Jonghae ,  LO, Chi Shun

    IPC: H01F17/00 ,  H01F21/08 ,  H01L23/64 ,  H01F27/28 ,  H01F41/04

    CPC classification number: H05K1/165 ,  H01F21/08 ,  H01F41/041 ,  H01F2017/002 ,  H01L21/4846 ,  H01L23/15 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/645 ,  H01L2924/0002 ,  H05K1/0251 ,  Y10T29/4902 ,  H01L2924/00

    Abstract: A through via inductor or transformer in a high-resistance substrate in an electronic package. In one embodiment, the package comprises a target inductor which includes a through-via formed in the substrate through which a signal passes and a tuner inductor which includes a through-via formed in the substrate such that the through-via has an independent signal passing therethrough. The direction of the signal passing through the tuner inductor can be independently controlled to adjust the total inductance of the target inductor. In another embodiment, a transformer can comprise a primary loop and a secondary loop, each of which includes a plurality of through-vias that are coupled to a plurality of conductive traces. The primary loop forms a first continuous conductive path and the secondary loop forms a second continuous conductive path. A signal passing through the primary loop can induce a signal in the secondary loop such that the induced signal is dependent on the transformer ratio.

    Abstract translation: 电子封装中的高电阻基板中的通孔电感器或变压器。 在一个实施例中，封装包括目标电感器，其包括形成在基板中的通孔，信号通过该通孔，以及调谐器电感器，其包括形成在基板中的通孔，使得通孔具有独立的信号通过 穿过。 可以独立地控制通过调谐器电感器的信号的方向来调节目标电感器的总电感。 在另一个实施例中，变压器可以包括主回路和次级回路，每个回路包括耦合到多个导电迹线的多个通孔。 主回路形成第一连续导电路径，次级环形成第二连续导电路径。 通过主回路的信号可以在次级回路中感应出信号，使感应信号取决于变压器的比例。

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