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公开(公告)号：JPH04270473A
公开(公告)日：1992-09-25
申请号：JP7431291
申请日：1991-03-15
Applicant: APPLE COMPUTER
IPC: G06F3/153 , G06T5/00 , G06T9/00 , G09G5/02 , G09G5/36 , G09G5/42 , H04N1/41 , H04N1/64 , H04N11/04
Abstract: PURPOSE: To adaptively compress/restore video data to obtain an aliasing prevention mode by checking (n×n)-picture element blocks of picture element data to judge which compression system should be used, for every block. CONSTITUTION: Video data is divided into blocks of n×n picture elements, for example, 4x4 picture elements, and different colors are settled for them. That is, they are obtained by averaging colors whose luminances are higher and lower than the average luminance of blocks. Generally, two different colors are calculated in an RGB space. The difference between these two colors is checked; and if this difference is larger than a first threshold, at least two colors and an n×n-bit map are stored to store the picture element data block. When it is smaller than the first threshold, the picture element data block is stored as a single color without a bit map. At the time of decoding, two colors are obtained by calculation, and bit map data is used to select one of four colors for every picture element.
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公开(公告)号：JPH03266382A
公开(公告)日：1991-11-27
申请号：JP30279190
申请日：1990-11-09
Applicant: APPLE COMPUTER
Inventor： ERITSUKU GURIYUUENBAAGU
IPC: H01R24/38
Abstract: PURPOSE: To simplify use while omitting the positioning before the connection, by forming a post by a number of conducive contact bands, and forming a shell by a number of conductive contact rings, in a connector having the post and the shell. CONSTITUTION: A connector comprises a post 100, a shell 200 and a connector body 30. The post 100 is formed by an insulating post 13 supporting a number of conductive contact bands 7-10, and the shell 200 is formed by an insulating shell 12 supporting a number of conductive contact rings 1-6. An outer periphery is converted by a tubular shield 14. One end of the post 100 and that of the shell 200 are opened, and a socket is inserted into the shield 14 like a nest. The insulator of the socket is inserted between the post 100 and the shell 200, and is brought into contact with the contact rings and bands by the flat spring contact. Thereby the positioning before the connection becomes unnecessary, and the connector can be easily used.
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公开(公告)号：JPH03211686A
公开(公告)日：1991-09-17
申请号：JP30423790
申请日：1990-11-13
Applicant: APPLE COMPUTER
Inventor： DANIERU ESU BUENORIA
IPC: G06F3/14 , G06F3/0481 , G06T15/00 , G06T15/60 , G09G5/08
Abstract: PURPOSE: To facilitate the three-dimensional movement of an object on a display screen by displaying a shadow area relating to a cursor. CONSTITUTION: In an interactive computer controlled display device, the cursor 2 provided with a, position corresponding to the three-dimensional movement of a cursor controller and provided with at least one edge is displayed on a data display screen 1. Then, the shadow 3 provided with the edge corresponding to the edge of the cursor 2 projected on a two-dimensional shadow plane 4 along a light vector and provided with the position corresponding to the three- dimensional movement of the cursor controller is displayed on the display screen 1. Thus, a user is helped to discriminate the movement and position of the object in a space.
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公开(公告)号：JPH03171317A
公开(公告)日：1991-07-24
申请号：JP23729490
申请日：1990-09-10
Applicant: APPLE COMPUTER
Inventor： AARU SUTEIIBUN SUMISU , MAIKU ESU HANRON , ROBAATO ERU BEIRII
Abstract: PURPOSE: To reduce the power consumption of a lap top computer by monitoring various devices and controlling the distribution of power to the various devices of the computer. CONSTITUTION: In order to economize the power of a battery 17 by cutting power supply to the device not to be used, a power managing device 11 continuously monitors various circuit functions. This power managing device 11 can be operated in three operating modes and in the 1st mode, a computer 10 is operated in an ordinary activity mode. Besides, the 2nd state is called sleep state, the computer 10 is turned into inactive state, and the power managing device 11 continuously monitors the various conditions of circuits. Further, the 3rd state is an intermediate state and in such a state, the power managing device 11 decreases the frequency of a clock signal so that the power consumption can be decreased for about 25%-30% rather than that of ordinary operating mode. Thus, the service life of the built-in battery can be prolonged so that the lap top computer 10 can be operated for a long time when external power is cut off.
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公开(公告)号：JPH03164961A
公开(公告)日：1991-07-16
申请号：JP24415390
申请日：1990-09-17
Applicant: APPLE COMPUTER
Inventor： POORU MAATEIN DONOBUAN , MAIKERU POORU KARUSO
IPC: G06F3/00 , G06F3/038 , G06F13/38 , H04L12/403
Abstract: PURPOSE: To provide a sure system for which the number of counters is less and a cost is relatively low by connecting a transmission means to a counting mechanism and demodulation logic. CONSTITUTION: The high counting flag means 18 and low counting flag means 20 of a data communication equipment 10 are connected to a serial data bus 12 and the instantaneous period of the high signal level and low signal level of the data bus is decided. A demodulation logic means 22 demodulates the high signal level and the low signal level to binary data. Then, the output of the demodulation logic means 22 is inputted to the remaining 24 of chip logic for performing the related function of the equipment. In this case, a serial data bus transmitter means 26 is connected to the high and low counting flag means and the demodulation logic means 22, modulates the binary data received from the equipment while performing the related function and inputs obtained modulated data to the serial data bus 12. Thus, the number of the counters is reduced as much as possible.
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Patent Agency Ranking
公开(公告)号：JPH03130798A
公开(公告)日：1991-06-04
申请号：JP21053890
申请日：1990-08-10
Applicant: APPLE COMPUTER
Inventor： ROBAATO ERU BEIRII , BURAIAN DEI HAWAADO
Abstract: PURPOSE: To improve system performance by determining the priority of access to a RAM and refusing the access from a CPU to the RAM during the read of video data from the RAM. CONSTITUTION: A CPU 13 of a system 10 executes a program for supplying the video data to a monitor 27. The monitor 27 is programmed as a matrix composed of plural pixels. Then, the pixels are expressed by a certain number of bits in the video data stored inside the system memory or a RAM 11 of the computer. Besides, a video integrated circuit is connected to the RAM 11 and supplies the video data for N bits per pixel to the monitor 27. In this case, the priority of access to the RAM 11 is determined so as to reduce the access from the CPU 13 to the RAM 11 by a memory controller while a video circuit reads data from the RAM 11. Thus, the need of communication with a video card is eliminated to improve system performance.
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公开(公告)号：JPH03102215A
公开(公告)日：1991-04-26
申请号：JP13277790
申请日：1990-05-24
Applicant: APPLE COMPUTER
Inventor： POORU EMU DONOBUAN
Abstract: PURPOSE: To reduce the power consumption, by providing a freely positionable light shield means for opening and closing an optical path generated from a light source means to a light convergence and electric conduction means and synchronizing the light source means and the light convergence and electric conduction means in pulse. CONSTITUTION: A pulse input means 12 for generating a pulse-like electric signal is provided on a device 10, and connected to a light source means 14. A current limit resistor R and a light emitting diodes D1, D2 mutually connected in series are provided on the means 14, which is connected to a ground point 16. Two phototransistors PT1, PT2 are connected to the means 12. The optical paths of light beams 20, 22 generated from the diodes D1, D2 are opened and closed. Consequently, pulse output generated from the transistors PT1, PT2 which are a light convergence and electric conduction means is transmitted to an encoder 24, and utilized for encoding. Thus, since the means 14 and the transistors PT1, PT2 are synchronized in pulse, power consumption can be held minimum.
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公开(公告)号：JPH0340169A
公开(公告)日：1991-02-20
申请号：JP16148990
申请日：1990-06-21
Applicant: APPLE COMPUTER
Inventor： AREN JIEI BOOMU , MAIRON EICHI MAKUDOGARU
IPC: G06F15/16 , G06F12/08 , G06F15/177
Abstract: PURPOSE: To realize inter-processor control/synchronization by providing an accessable global status register means where plural operation status codes are stored and indicating one of operation modes in a corresponding processor by plural operation status codes. CONSTITUTION: Four independent processors(PU) 12a to 12d access an instruction cache and a data cache through mutual connection networks 22 and 24 and individually have copies of prescribed special registers and share partial special registers (global registers) with one another. PUs are operated in a user mode or a system mode, and the mode of a PU at an arbitrary time is determined by setting of flags in PU status/control registers; and for example, when a start instruction, a restart instruction, and a transmission instruction are used, one PU can transmit an instruction address or a data value to another PU by one operation. Thus, inter-processor control/synchronization is realized.
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89.发明专利
公开(公告)号：JPS63279340A
公开(公告)日：1988-11-16
申请号：JP9328288
申请日：1988-04-15
Applicant: APPLE COMPUTER
Inventor： JIYOOJI NOOMAN , UEIN RUUFUBOAROU
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公开(公告)号：JPS54111618A
公开(公告)日：1979-09-01
申请号：JP16461078
申请日：1978-12-29
Applicant: APPLE COMPUTER
Inventor： FUREDERITSUKU ROTSUDONII FUORU
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