Reset in a system-on-chip circuit
    81.
    发明公开
    Reset in a system-on-chip circuit 审中-公开
    在einem系统片上Schaltkreis的Rücksetzen

    公开(公告)号:EP1615106A1

    公开(公告)日:2006-01-11

    申请号:EP04254030.2

    申请日:2004-07-05

    CPC classification number: G06F1/24

    Abstract: An electronic device having first circuitry (2) operating in a first clock environment (clk1) and second circuitry (33) operating in a second clock environment (clk2) the first circuitry (2) being arranged to generate a soft reset signal for resetting the second circuitry (33) the integrated circuit (11) further comprising: a soft reset hold circuit (3) clocked in the first clock environment (clk1) connected to receive the soft reset signal and to generate an output reset signal in an asserted state; and a synchroniser (5) clocked in the second clock environment (clk2) connected to receive the output reset signal and to generate a retimed reset signal in an asserted state after predetermined period, wherein the retimed reset signal is fed back to the soft reset hold circuit to cause the output reset signal to adopt a deasserted state at the end of said predetermined period.

    Abstract translation: 一种具有在第一时钟环境(clk1)中操作的第一电路(2)和在第二时钟环境(clk2)中工作的第二电路(33))的电子设备,所述第一电路(2)被布置成产生软复位信号,以复位 第二电路(33)还包括:软复位保持电路(3),其在第一时钟环境(clk1)中被连接以接收软复位信号并产生处于断言状态的输出复位信号; 以及在第二时钟环境(clk2)中被时钟的同步器(5),其连接以接收输出复位信号,并且在预定时段之后产生处于断言状态的重新定时复位信号,其中重新定时复位信号被反馈到软复位保持 电路,用于使所述输出复位信号在所述预定周期结束时采用无效状态。

    Card detection
    83.
    发明公开
    Card detection 有权
    Kartenerkennung

    公开(公告)号:EP1607899A1

    公开(公告)日:2005-12-21

    申请号:EP04253573.2

    申请日:2004-06-15

    CPC classification number: G06K7/0069 G06K7/0021

    Abstract: An embodiment of the invention comprises a card reader for reading data stored on a card. A contact signal is produced whose state is indicative of the presence or absence of electrical contact between the card and the card reader. A high state indicates the presence of electrical contact and a low state indicates the absence of electrical contact. Upon insertion of the card into the card reader, vibrations and other mechanical perturbations of the card cause the state of the contact signal to fluctuate rapidly between high and low states. The state of the contact signal is periodically sampled for a predetermined period of time and the number of samples for which the contact signal was high are counted. If the number of high samples exceeds a threshold then stable electrical contact is deemed to have been established between the card and the card reader and a system reset is performed. In one embodiment, the contact signal is sampled once every millisecond for 64 milliseconds, and a system reset occurs if the number of high samples exceeds 47.

    Abstract translation: 本发明的实施例包括用于读取存储在卡上的数据的读卡器。 产生接触信号,其状态指示卡和读卡器之间是否存在电接触。 高电平表示存在电接触,低电位表示不存在电接触。 当将卡插入读卡器时,卡的振动和其他机械扰动导致接触信号的状态在高状态和低状态之间迅速波动。 接触信号的状态在预定的时间周期内被周期性地采样,并对接触信号为高的样本数进行计数。 如果高采样数超过阈值,则认为在卡和读卡器之间建立了稳定的电接触,并执行系统复位。 在一个实施例中,接触信号每毫秒采样一次,持续64毫秒,如果高采样数超过47,则发生系统复位。

    An integrated circuit with test circuitry
    85.
    发明公开
    An integrated circuit with test circuitry 有权
    Ein integrierter Schaltkreis mit Boundary-Scan-Testschaltung

    公开(公告)号:EP1584939A1

    公开(公告)日:2005-10-12

    申请号:EP04252078.3

    申请日:2004-04-07

    CPC classification number: G01R31/318552

    Abstract: An integrated circuit comprising test circuitry, the test circuitry comprising a counter for counting clock signals and having an output for providing a control signal. The counter being arranged to have an internal state, and the counter being arranged to change the control signal on the internal state of counter reaching a predetermined value.

    Abstract translation: 一种包括测试电路的集成电路,所述测试电路包括用于对时钟信号进行计数并具有用于提供控制信号的输出的计数器。 计数器被布置成具有内部状态,并且该计数器被布置成在计数器的内部状态上改变控制信号达到预定值。

    At-speed testing of an integrated circuit
    86.
    发明公开
    At-speed testing of an integrated circuit 有权
    Hochgeschwindigkeitsprüfungvon integrierten Schaltungen

    公开(公告)号:EP1584938A1

    公开(公告)日:2005-10-12

    申请号:EP04252076.7

    申请日:2004-04-07

    CPC classification number: G01R31/318552

    Abstract: An integrated circuit comprising: functional circuitry; test circuitry connected to the functional circuitry, wherein the test circuitry is arranged to control the testing of the functional circuitry; and clock signal generating circuitry connected to both the functional circuitry and the test circuitry. Wherein the test circuitry is arranged to use the clock signal for testing the functional circuitry.

    Abstract translation: 一种集成电路,包括:功能电路; 连接到所述功能电路的测试电路,其中所述测试电路被布置成控制所述功能电路的测试; 以及连接到功能电路和测试电路两者的时钟信号发生电路。 其中测试电路被设置为使用时钟信号来测试功能电路。

    Tap multiplexer
    88.
    发明公开
    Tap multiplexer 有权
    TAP多路复用器

    公开(公告)号:EP1544633A1

    公开(公告)日:2005-06-22

    申请号:EP03257954.2

    申请日:2003-12-17

    Inventor: Warren, Bob

    CPC classification number: G01R31/318536 G01R31/318563

    Abstract: An integrated circuit comprising: a plurality of portions, each portion including test control circuitry; at least one test input arranged to receive test signals; and a multiplexer between said at least one test input and said test control circuitry, said multiplexer having a least one control input whereby the multiplexer is controllable to direct test signals to one of said plurality of portions.

    Abstract translation: 一种集成电路,包括:多个部分,每个部分包括测试控制电路; 至少一个测试输入被布置成接收测试信号; 以及在所述至少一个测试输入和所述测试控制电路之间的多路复用器,所述多路复用器具有至少一个控制输入,由此所述多路复用器可控制以将测试信号引导到所述多个部分中的一个。

    TAP sampling at double rate
    89.
    发明公开
    TAP sampling at double rate 有权
    TAP-Daten-Transfer mit Doppelter Daten-Rate

    公开(公告)号:EP1544632A1

    公开(公告)日:2005-06-22

    申请号:EP03257953.4

    申请日:2003-12-17

    Inventor: Warren, Bob

    Abstract: An integrated circuit comprising: at least one test input for receiving test data; test control circuitry between said at least one test input and circuitry to be tested; wherein said test data is clocked in on a rising clock edge and a falling clock edge.

    Abstract translation: 一种集成电路,包括:用于接收测试数据的至少一个测试输入; 所述至少一个测试输入和待测电路之间的测试控制电路; 其中所述测试数据在上升时钟沿和下降时钟沿被计时。

    Method for controlling services
    90.
    发明公开
    Method for controlling services 审中-公开
    Dienstkontrollverfahren

    公开(公告)号:EP1505796A1

    公开(公告)日:2005-02-09

    申请号:EP03254904.0

    申请日:2003-08-06

    CPC classification number: H04L67/16 H04L67/02 H04L67/10 H04L67/12 H04L69/329

    Abstract: A method and apparatus are provided for controlling services provided at a first electronic device at a second electronic device. A plurality of electronic devices connected to a network provide services in the form of providing data to the network, or allowing the data to be manipulated. Each service is represented as a manipulable data object created at the device providing the service. Each object contains sufficient information to allow the service the object represents to be controlled. The objects are transmitted over the network and are stored in an object list maintained by a master device. Any compatible device may then retrieve an object from the object list and use the information contained in it to fully control the service.

    Abstract translation: 提供了一种用于控制在第二电子设备处提供在第一电子设备处的服务的方法和装置。 连接到网络的多个电子设备以向网络提供数据或允许数据被操纵的形式提供服务。 每个服务都表示为在提供服务的设备上创建的可操纵的数据对象。 每个对象包含足够的信息以允许对象表示的服务被控制。 对象通过网络传输并存储在由主设备维护的对象列表中。 任何兼容设备然后可以从对象列表中检索对象,并使用其中包含的信息来完全控制服务。

Patent Agency Ranking