-
-
公开(公告)号:KR1019930002789B1
公开(公告)日:1993-04-10
申请号:KR1019900021837
申请日:1990-12-26
Applicant: 한국전자통신연구원
IPC: G06F13/40
Abstract: The circuit expands variable length of data in a 32 bit microprocessor to simplify the variation of word length. It includes a two input multiplexer (1) for selecting half-word data (31...0 or 32...16) according to the address signal (A1) for bite-positioning, a four input multiplexer (2), a multiplexer (3) for selecting code, and an expansion multiplexer (5) for selecting one of the data, which is zero expanded, code expanded or original code.
Abstract translation: 该电路在32位微处理器中扩展了可变长度的数据,以简化字长的变化。 它包括用于根据用于咬定位的地址信号(A1)来选择半字数据(31 ... 0或32 ... 16)的双输入多路复用器(1),四输入多路复用器(2), 用于选择代码的多路复用器(3)和用于选择零扩展,代码扩展或原始代码的数据之一的扩展多路复用器(5)。
-
-