公开(公告)号：KR100455070B1

公开(公告)日：2004-11-06

申请号：KR1020020010166

申请日：2002-02-26

Applicant: 한국전자통신연구원

Inventor： 박상희 ,  이용의 ,  윤선진 ,  강영일 ,  김용신

IPC: H01L33/12 ,  H01L33/16

Abstract: PURPOSE: A method for fabricating a c-axis oriented ZnO thin film using an atomic layer deposition(ALD) method is provided to form a thin film oriented to a c-axis by using a glass substrate of low price and large area at a temperature of 300 deg.C or lower. CONSTITUTION: The substrate is positioned inside a chamber(S101). A zinc precursor is injected to the chamber together with carrier gas so that a zink precursor reactant is absorbed to the substrate(S102). Nitrogen gas or inert gas is injected to remove non-absorbed particles(S103). Oxygen gas is injected(S104). Oxygen precursors are injected to form a zink oxide thin film through a surface chemical reaction(S105). Nitrogen gas or inert gas is injected to eliminate non-absorbed particles and surface chemical byproducts(S106).

Abstract translation: 目的：提供一种使用原子层沉积（ALD）法制造c轴取向的ZnO薄膜的方法，以通过使用价格低且大面积的玻璃基板在温度下形成取向为c轴的薄膜 300℃或更低。 构成：衬底位于室内（S101）。 将锌前体与载气一起注入腔室，从而将锌前体反应物吸收到基板上（S102）。 注入氮气或惰性气体以去除未吸收的颗粒（S103）。 注入氧气（S104）。 通过表面化学反应注入氧前体以形成氧化锌薄膜（S105）。 注入氮气或惰性气体以消除未吸收的颗粒和表面化学副产物（S106）。

公开(公告)号：KR1020030070675A

公开(公告)日：2003-09-02

申请号：KR1020020010166

申请日：2002-02-26

Applicant: 한국전자통신연구원

Inventor： 박상희 ,  이용의 ,  윤선진 ,  강영일 ,  김용신

IPC: H01L33/12 ,  H01L33/16

Abstract: PURPOSE: A method for fabricating a c-axis oriented ZnO thin film using an atomic layer deposition(ALD) method is provided to form a thin film oriented to a c-axis by using a glass substrate of low price and large area at a temperature of 300 deg.C or lower. CONSTITUTION: The substrate is positioned inside a chamber(S101). A zinc precursor is injected to the chamber together with carrier gas so that a zink precursor reactant is absorbed to the substrate(S102). Nitrogen gas or inert gas is injected to remove non-absorbed particles(S103). Oxygen gas is injected(S104). Oxygen precursors are injected to form a zink oxide thin film through a surface chemical reaction(S105). Nitrogen gas or inert gas is injected to eliminate non-absorbed particles and surface chemical byproducts(S106).

Abstract translation: 目的：提供使用原子层沉积（ALD）方法制造c轴取向的ZnO薄膜的方法，以通过使用低价格和大面积的玻璃基板在温度下形成取向为c轴的薄膜 为300℃以下。 构成：衬底位于腔室内（S101）。 将锌前体与载气一起注入到腔室中，使得锌镉前体反应物被吸收到基底上（S102）。 注入氮气或惰性气体以除去未吸收的颗粒（S103）。 注入氧气（S104）。 注入氧前体以通过表面化学反应形成锌氧化物薄膜（S105）。 注入氮气或惰性气体以消除未吸收的颗粒和表面化学副产物（S106）。

公开(公告)号：KR1020030064028A

公开(公告)日：2003-07-31

申请号：KR1020020004433

申请日：2002-01-25

Applicant: 한국전자통신연구원

Inventor： 이용의 ,  박상희 ,  윤선진 ,  김용신

IPC: H05B33/26

CPC classification number: H05B33/145 ,  H05B33/10 ,  H05B33/12 ,  H05B33/26

Abstract: PURPOSE: An electro-luminescence display is provided to reduce a loss of light to a side portion and improve the luminance by forming a phosphor layer or a transparent conductive layer having a projection-shaped surface. CONSTITUTION: An electro-luminescence display includes a substrate(21), the first electrode(22), a phosphor layer(24), and the second electrode(26). The first electrode is formed on an upper portion of the substrate. The phosphor layer is formed on an upper portion of the first electrode. The second electrode is formed on an upper portion of the phosphor layer. One of the first electrode, the phosphor layer, and the second electrode has a projection-shaped surface. The first insulating layer(23) is formed between the first electrode and the phosphor layer. The second insulating layer(25) is formed between the phosphor layer and the second electrode.

Abstract translation: 目的：提供电致发光显示器，以减少对侧面部分的光损失，并且通过形成具有突出形状的表面的荧光体层或透明导电层来提高亮度。 构成：电致发光显示器包括基板（21），第一电极（22），荧光体层（24）和第二电极（26）。 第一电极形成在基板的上部。 荧光体层形成在第一电极的上部。 第二电极形成在荧光体层的上部。 第一电极，荧光体层和第二电极中的一个具有突出形状的表面。 第一绝缘层（23）形成在第一电极和荧光体层之间。 第二绝缘层（25）形成在荧光体层和第二电极之间。

公开(公告)号：KR100319766B1

公开(公告)日：2002-01-05

申请号：KR1019990059759

申请日：1999-12-21

Applicant: 한국전자통신연구원

Inventor： 윤선진 ,  김용신 ,  박상희

IPC: H05B33/14

Abstract: 다색또는천연색을발광하는전계발광소자에관한것으로, 이를위한본 발명은하나의기판상에복수개의색을발광하기위해교류구동형단색전계발광소자와직류구동형단색전계발광소자를포함하여이루어지고, 그리고본 발명은발광색과모체에따라적합한구동방식을택하여수평및 수직배열하여하이브리드형으로제조하거나, 각각의전계발광소자를포함하는두 기판을접함하므로써보다우수한발광특성을가진다색및 천연색전계발광소자를구현할수 있는효과가있다.

公开(公告)号：KR1020010062973A

公开(公告)日：2001-07-09

申请号：KR1019990059759

申请日：1999-12-21

Applicant: 한국전자통신연구원

Inventor： 윤선진 ,  김용신 ,  박상희

IPC: H05B33/14

CPC classification number: H05B33/20 ,  H05B33/14

Abstract: PURPOSE: An AC-DC hybrid type thin film EL(ElectroLuminescence) is provided to emit natural colors of high purity and high brightness and enhance the emission efficiency by selecting a drive circuit suitable to the luminescence characteristics according to respective colors. CONSTITUTION: An AC drive type single EL for emitting a plurality of colors and a DC drive type single EL for emitting a plurality of colors are formed on one substrate(11). The AC drive type single EL comprises a transparent anode(12), a fluorescent layer(13), an electron supply and electron acceleration layer(14) and a metal cathode(16) sequentially formed in their order. The DC drive type single EL comprises a transparent anode(12), a lower insulating layer(17), a fluorescent layer(13), an upper insulating layer(18) and a metal cathode(16).

Abstract translation: 目的：提供AC-DC混合型薄膜EL（ElectroLuminescence）以通过根据各种颜色选择适合于发光特性的驱动电路来发射高纯度和高亮度的自然色，并提高发光效率。 构成：在一个基板（11）上形成用于发射多种颜色的AC驱动型单EL和用于发射多种颜色的DC驱动型单EL。 AC驱动型单EL包括顺序依次形成的透明阳极（12），荧光层（13），电子供给和电子加速层（14）以及金属阴极（16）。 直流驱动型单EL包括透明阳极（12），下绝缘层（17），荧光层（13），上绝缘层（18）和金属阴极（16）。

公开(公告)号：KR1020010057760A

公开(公告)日：2001-07-05

申请号：KR1019990061159

申请日：1999-12-23

Applicant: 한국전자통신연구원

Inventor： 김용신 ,  윤선진 ,  박상희

IPC: H05B33/22 ,  H01L33/02

Abstract: PURPOSE: A method for manufacturing an electroluminescent device is provided to improve brightness and lifetime of the device, by using an insulator which has high permittivity, guarantees stability regarding an electric field and prevents contamination by chlorine. CONSTITUTION: The first electrode, a lower insulating layer(3), a luminescent layer, an upper insulating layer(5) and the second electrode are sequentially stacked on a substrate(1). A Ta2O5 thin film is formed in at least one of the upper and lower insulating layers by using a reactive surface chemical vapor deposition method.

Abstract translation: 目的：提供一种用于制造电致发光器件的方法，通过使用具有高电容率的绝缘体来提高器件的亮度和使用寿命，保证电场稳定性并防止氯的污染。 构成：第一电极，下绝缘层（3），发光层，上绝缘层（5）和第二电极依次层叠在基板（1）上。 通过使用反应性表面化学气相沉积法在上绝缘层和下绝缘层中的至少一个中形成Ta 2 O 5薄膜。

公开(公告)号：KR101849268B1

公开(公告)日：2018-04-18

申请号：KR1020110094568

申请日：2011-09-20

Applicant: 한국전자통신연구원

Inventor： 오힘찬 ,  박상희 ,  황치선 ,  유민기

IPC: H01L29/786 ,  H01L21/336

CPC classification number: H01L29/7869

Abstract: 본발명은빛과전압스트레스에강한산화물박막트랜지스터및 그의제조방법에관한것으로, 박막트랜지스터의전기적특성, 양전압신뢰성을크게저하시키지않으면서공정온도를높이지않고, 특별한원소를첨가하지않아도광전압신뢰성을용이하고간단하게향상시키기위해서, 기판상에게이트전극을형성하는단계; 상기게이트전극을포함하는상부에게이트절연층을형성하는단계; 상기절연층상에소스전극및 드레인전극을형성하는단계; 상기게이트절연층에의해상기게이트전극과절연되며산화물반도체와확산방지막으로이루어진활성층을형성하는단계; 및상기소스전극및 드레인전극의일부와활성층을포함하는상부에보호층을형성하는단계를포함하며, 상기확산방지막은홀의이동을저하시키고, 이온화된산소공공의확산을방지하기위한특성을갖는것을특징으로한다.

公开(公告)号：KR1020160101658A

公开(公告)日：2016-08-25

申请号：KR1020160004915

申请日：2016-01-14

Applicant: 한국전자통신연구원 ,  한국과학기술원

Inventor： 박상희 ,  황치선 ,  유민기 ,  피재은 ,  고종범 ,  염혜인

IPC: H01L29/786 ,  H01L21/027 ,  H01L21/306 ,  G03F7/20

Abstract: 반도체소자및 이를제조하는방법을제공한다. 반도체소자는, 기판상에배치되고, 채널영역을제공하는제2 반도체패턴과, 기판및 제2 반도체패턴사이에배치되며제2 반도체패턴과접하는부분은채널영역으로제공되고, 제2 반도체패턴에의해노출되는부분들은소스/드레인영역들로제공되는제1 반도체패턴을포함한다.

Abstract translation: 提供半导体器件及其制造方法。 半导体器件包括：布置在衬底上的第二半导体图案，提供沟道区; 布置在所述基板和所述第二半导体图案之间的第一半导体图案，向所述沟道区域提供接触所述第二半导体图案的部分; 以及由第二半导体图案暴露于源/漏区的部分。 因此，能够降低半导体的处理成本，能够提高半导体装置的稳定性。

公开(公告)号：KR101420289B1

公开(公告)日：2014-07-17

申请号：KR1020100104744

申请日：2010-10-26

Applicant: 한국전자통신연구원 ,  패컬티 오브 사이언스 앤드 테크놀로지 유니버시티 오브 뉴 리스본

Inventor： 박상희 ,  황치선 ,  변춘원 ,  엘비라엠씨포르투나토 ,  로드리고에프피마틴즈 ,  아나알엑스바로스 ,  누노에프오코레이아 ,  페드로엠씨바르퀸하 ,  비토엠엘피게이레두

IPC: H01L21/316

Abstract: 본 발명은 P형 산화물 반도체막이 적용된 반도체 소자 및 그 제조 방법에 관한 것이다. 본 발명은 반도체 소자에 있어서, 구리 금속이 함유된 일산화구리산화물; 주석 금속이 함유된 일산화주석산화물; 구리 및 주석 합금이 함유된 구리주석산화물; 및 니켈 주석 합금이 함유된 니켈주석산화물로 이루어진 군으로부터 선택된 적어도 하나의 P형 산화막을 기반으로 하는 P형 산화막을 포함한다.
본 발명에 따르면, P형 산화막을 이용하여 투명 또는 불투명 소자들을 용이하게 개발할 수 있다. 또한, 본 발명에 따르면 저온 공정이 가능한 산화막을 반도체 소자에 적용하므로, 제조 공정이 간단하고, 제조 단가가 낮다는 장점이 있다.

Abstract translation: 本发明涉及一种应用P型氧化物半导体膜的半导体器件及其制造方法。 本发明涉及一种半导体器件，其包含：含铜金属的氧化铜; 含锡金属的氧化锡一氧化物; 包含铜和锡合金的铜锡氧化物; 以及基于选自包含镍锡合金的镍锡氧化物的至少一种p型氧化物膜的p型氧化物膜。

公开(公告)号：KR1020140078190A

公开(公告)日：2014-06-25

申请号：KR1020120147257

申请日：2012-12-17

Applicant: 한국전자통신연구원

Inventor： 유민기 ,  박상희 ,  황치선

IPC: H01L29/786 ,  H01L21/336

CPC classification number: H01L29/78648 ,  H01L27/1225 ,  H01L29/7869

Abstract: A transistor according to an embodiment of the present invention includes a lower gate electrode on a substrate; a lower gate insulating film covering at least a portion of the lower gate electrode; a semiconductor layer provided on the lower gate insulating film and having a source region, a channel region, and a drain region; an upper gate electrode disposed on the semiconductor layer at a position corresponding to the lower gate electrode; an upper gate insulating film on the semiconductor layer; and an upper electrode disposed on the upper gate insulating film and having a coplanar with the upper gate electrode. The channel region is disposed at a position corresponding to the lower gate electrode and the upper gate electrode. The upper electrode may include a first upper electrode connected to the source region and a second upper electrode connected to the drain region.

Abstract translation: 根据本发明的实施例的晶体管包括在基板上的下栅电极; 覆盖所述下栅电极的至少一部分的下栅极绝缘膜; 设置在下部栅极绝缘膜上并具有源极区域，沟道区域和漏极区域的半导体层; 在与所述下栅电极相对应的位置上配置在所述半导体层上的上栅电极; 半导体层上的上栅极绝缘膜; 以及设置在上栅极绝缘膜上并与上栅电极共面的上电极。 沟道区域设置在与下栅电极和上栅电极相对应的位置处。 上部电极可以包括连接到源极区域的第一上部电极和连接到漏极区域的第二上部电极。