Autonomous ultrasound probe and related apparatus and methods

    公开(公告)号:AU2016263091A1

    公开(公告)日:2017-11-02

    申请号:AU2016263091

    申请日:2016-05-13

    Abstract: An ultrasound apparatus comprising a plurality of ultrasonic transducers, a non-acoustic sensor, a memory circuitry to store control data for operating the ultrasound apparatus to perform an acquisition task, and a controller. The controller is configured to receive an indication to perform the acquisition task, receive non-acoustic data obtained by the non- acoustic sensor, and control, based on the control data and the non-acoustic data, the plurality of ultrasonic transducers to obtain acoustic data for the acquisition task.

    ULTRASOUND SIGNAL PROCESSING CIRCUITRY AND RELATED APPARATUS AND METHODS

    公开(公告)号:CA3011341A1

    公开(公告)日:2017-07-20

    申请号:CA3011341

    申请日:2016-10-21

    Inventor: RALSTON TYLER S

    Abstract: Ultrasound signal processing circuitry and related apparatus and methods are described. Groups of signal samples corresponding to respective acquisitions performed by an ultrasound transducer array may be processed by being transformed to the Fourier domain and via the application of one or more weighting functions. The transformed groups of signals may be combined with one another in the Fourier domain to obtain a Fourier-compounded set of signals that may be used for image formation.

    Monolithic ultrasonic imaging devices, systems and methods

    公开(公告)号:AU2014235032A1

    公开(公告)日:2015-10-01

    申请号:AU2014235032

    申请日:2014-03-13

    Abstract: To implement a single-chip ultrasonic imaging solution, on-chip signal processing may be employed in the receive signal path to reduce data bandwidth and a high-speed serial data module may be used to move data for all received channels off-chip as digital data stream. The digitization of received signals on-chip allows advanced digital signal processing to be performed on-chip, and thus permits the full integration of an entire ultrasonic imaging system on a single semiconductor substrate. Various novel waveform generation techniques, transducer configuration and biasing methodologies, etc., are likewise disclosed. HIFU methods may additionally or alternatively be employed as a component of the "ultrasound- on- a-chip" solution disclosed herein.

    MONOLITHIC ULTRASONIC IMAGING DEVICES, SYSTEMS AND METHODS

    公开(公告)号:CA2903479A1

    公开(公告)日:2014-09-25

    申请号:CA2903479

    申请日:2014-03-13

    Abstract: To implement a single-chip ultrasonic imaging solution, on-chip signal processing may be employed in the receive signal path to reduce data bandwidth and a high-speed serial data module may be used to move data for all received channels off-chip as digital data stream. The digitization of received signals on-chip allows advanced digital signal processing to be performed on-chip, and thus permits the full integration of an entire ultrasonic imaging system on a single semiconductor substrate. Various novel waveform generation techniques, transducer configuration and biasing methodologies, etc., are likewise disclosed. HIFU methods may additionally or alternatively be employed as a component of the "ultrasound- on- a-chip" solution disclosed herein.

    Ultrasound apparatuses and methods for fabricating ultrasound devices

    公开(公告)号:AU2018369882A1

    公开(公告)日:2020-05-21

    申请号:AU2018369882

    申请日:2018-11-15

    Abstract: Aspects of the technology described herein relate to an ultrasound device including a first die that includes an ultrasonic transducer, a first application- specific integrated circuit (ASIC) that is bonded to the first die and includes a pulser, and a second ASIC in communication with the second ASIC that includes integrated digital receive circuitry. In some embodiments, the first ASIC may be bonded to the second ASIC and the second ASIC may include analog processing circuitry and an analog-to-digital converter. In such embodiments, the second ASIC may include a through-silicon via (TSV) facilitating communication between the first ASIC and the second ASIC. In some embodiments, SERDES circuitry facilitates communication between the first ASIC and the second ASIC and the first ASIC includes analog processing circuitry and an analog-to-digital converter. In some embodiments, the technology node of the first ASIC is different from the technology node of the second ASIC.

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