-
公开(公告)号:US20220375871A1
公开(公告)日:2022-11-24
申请号:US17323423
申请日:2021-05-18
Applicant: GLOBALFOUNDRIES U.S. Inc.
Inventor: Sunil K. Singh , Vibhor Jain , Siva P. Adusumilli , Sebastian T. Ventrone , Johnatan A. Kantarovsky , Yves T. Ngu
IPC: H01L23/544 , H01L23/48 , G01N21/64
Abstract: The disclosure provides an integrated circuit (IC) structure with fluorescent materials, and related methods. An IC structure according to the disclosure may include a layer of fluorescent material on an IC component. The layer of fluorescent material defines a portion of an identification marker for the IC structure.
-
公开(公告)号:US11502214B2
公开(公告)日:2022-11-15
申请号:US17196756
申请日:2021-03-09
Applicant: GLOBALFOUNDRIES U.S. Inc.
Inventor: Siva P. Adusumilli , Mark D. Levy , Yusheng Bian
IPC: H01L31/105 , H01L31/18 , H01L31/0352 , H01L27/146
Abstract: The present disclosure relates to semiconductor structures and, more particularly, to photodetectors used with a broadband signal and methods of manufacture. The structure includes: a first photodetector; a second photodetector adjacent to the first photodetector; a first airgap of a first size under the first photodetector structured to detect a first wavelength of light; and a second airgap of a second size under the second photodetector structured to detect a second wavelength of light.
-
公开(公告)号:US11488980B2
公开(公告)日:2022-11-01
申请号:US17003179
申请日:2020-08-26
Applicant: GLOBALFOUNDRIES U.S. INC.
Inventor: Siva P. Adusumilli , Anthony K. Stamper , Bruce W. Porth , John J. Ellis-Monaghan
IPC: H01L27/12 , H01L21/762 , H01L29/06
Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a wafer with localized cavity structures and methods of manufacture. A structure includes a bulk substrate with localized semiconductor on insulator (SOI) regions and bulk device regions, the localized SOI regions includes multiple cavity structures and substrate material of the bulk substrate.
-
公开(公告)号:US11488950B2
公开(公告)日:2022-11-01
申请号:US17173611
申请日:2021-02-11
Applicant: GLOBALFOUNDRIES U.S. Inc.
Inventor: Uzma B. Rana , Vibhor Jain , Anthony K. Stamper , Qizhi Liu , Siva P. Adusumilli
IPC: H01L27/06 , H01L29/732 , H01L21/8249 , H01L29/66 , H01L29/10 , H01L29/08 , H01L29/737 , H01L29/73
Abstract: Aspects of the disclosure provide an integrated circuit (IC) structure with a bipolar transistor stack within a substrate. The bipolar transistor stack may include: a collector, a base on the collector, and an emitter on a first portion of the base. A horizontal width of the emitter is less than a horizontal width of the base, and an upper surface of the emitter is substantially coplanar with an upper surface of the substrate. An extrinsic base structure is on a second portion of the base of the bipolar transistor stack, and horizontally adjacent the emitter. The extrinsic base structure includes an upper surface above the upper surface of the substrate.
-
公开(公告)号:US11410872B2
公开(公告)日:2022-08-09
申请号:US16206375
申请日:2018-11-30
Applicant: GLOBALFOUNDRIES U.S. INC.
Inventor: Siva P. Adusumilli , Steven M. Shank , John J. Ellis-Monaghan , Anthony K. Stamper
IPC: H01L29/00 , H01L29/51 , H01L21/762 , H01L21/308 , H01L29/10 , H01L21/306 , H01L29/06
Abstract: The present disclosure relates to semiconductor structures and, more particularly, to oxidized cavity structures within and under semiconductor devices and methods of manufacture. The structure includes: a substrate material; active devices over the substrate material; an oxidized trench structure extending into the substrate and surrounding the active devices; and one or more oxidized cavity structures extending from the oxidized trench structure and formed in the substrate material under the active devices.
-
公开(公告)号:US20220238631A1
公开(公告)日:2022-07-28
申请号:US17155445
申请日:2021-01-22
Applicant: GLOBALFOUNDRIES U.S. Inc.
Inventor: Michael J. Zierak , Siva P. Adusumilli , Yves T. Ngu , Steven M. Shank
IPC: H01L49/02 , H01L21/762
Abstract: A structure provides a polysilicon resistor under a shallow trench isolation (STI). The structure includes the STI, a resistor in the form of a doped buried polysilicon layer under the STI, and a high resistivity (HR) polysilicon layer under the doped buried polysilicon layer. The structure also includes a pair of contacts operatively coupled in a spaced manner to the doped buried polysilicon layer. A related method is also disclosed.
-
公开(公告)号:US11380759B2
公开(公告)日:2022-07-05
申请号:US16939213
申请日:2020-07-27
Applicant: GLOBALFOUNDRIES U.S. INC.
Inventor: Uzma Rana , Anthony K. Stamper , Johnatan A. Kantarovsky , Steven M. Shank , Siva P. Adusumilli
IPC: H01L29/06 , H01L21/762 , H01L29/78 , H01L29/66 , H01L21/763 , H01L21/8234 , H01L29/10
Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a transistor with an embedded isolation layer in a bulk substrate and methods of manufacture. The structure includes: a bulk substrate; an isolation layer embedded within the bulk substrate and below a top surface of the bulk substrate; a deep trench isolation structure extending through the bulk substrate and contacting the embedded isolation layer; and a gate structure over the top surface of the bulk substrate and vertically spaced away from the embedded isolation layer, the deep trench isolation structure and the embedded isolation layer defining an active area of the gate structure in the bulk substrate.
-
公开(公告)号:US20220189821A1
公开(公告)日:2022-06-16
申请号:US17123184
申请日:2020-12-16
Applicant: GLOBALFOUNDRIES U.S. Inc.
Inventor: Mark D. Levy , Siva P. Adusumilli , Alvin J. Joseph
IPC: H01L21/762 , H01L21/763 , H01L23/367 , H01L27/12
Abstract: A structure includes an active device over an area of a substrate, and a heat spreading isolation structure adjacent the active device. The isolation structure includes a dielectric layer above a heat-conducting layer. The heat-conducting layer may include polycrystalline graphite. The heat-conducting layer provides a heat sink, which provides a high thermal conductivity path for heat with low electrical conductivity. The heat-conducting layer may extend into the substrate. The substrate may include an SOI substrate in which case the heat-conducting layer may extend through the buried insulator thereof.
-
公开(公告)号:US20220173233A1
公开(公告)日:2022-06-02
申请号:US17109538
申请日:2020-12-02
Applicant: GLOBALFOUNDRIES U.S. Inc.
Inventor: Siva P. Adusumilli , Mark Levy , Jeonghyun Hwang
IPC: H01L29/778 , H01L29/20 , H01L29/66 , H01L29/04 , H01L27/088 , H01L29/16
Abstract: Structures including devices, such as transistors, integrated on a semiconductor substrate and methods of forming a structure including devices, such as transistors, integrated on a semiconductor substrate. A first transistor is formed in a first device region of a semiconductor substrate, and a second transistor is formed in a second device region of the semiconductor substrate. The second transistor includes a layer stack on the semiconductor substrate, and the layer stack includes a layer comprised of a III-V compound semiconductor material. A polycrystalline layer includes a section that is positioned in the semiconductor substrate beneath the first device region.
-
90.
公开(公告)号:US20220165676A1
公开(公告)日:2022-05-26
申请号:US16953441
申请日:2020-11-20
Applicant: GLOBALFOUNDRIES U.S. INC.
Inventor: Vibhor Jain , Sunil K. Singh , Johnatan A. Kantarovsky , Siva P. Adusumilli , Sebastian T. Ventrone , John J. Ellis-Monaghan , Yves T. Ngu
IPC: H01L23/544 , H01L23/00
Abstract: The disclosure provides a method to authenticate an integrated circuit (IC) structure. The method may include forming a first authentication film (AF) material within the IC structure. A composition of the first AF material is different from an adjacent material within the IC structure. The method includes converting the first AF material into a void within the IC structure. Additionally, the method includes creating an authentication map of the IC structure to include a location of the void in the IC structure for authentication of the IC structure.
-
-
-
-
-
-
-
-
-