公开(公告)号：US20220165663A1

公开(公告)日：2022-05-26

申请号：US17104078

申请日：2020-11-25

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Ephrem G. Gebreselasie ,  Vibhor Jain ,  Yves T. Ngu ,  Johnatan A. Kantarovsky ,  Alain F. Loiseau

IPC: H01L23/525 ,  H01L27/07 ,  H01L21/02 ,  H01L21/8249

Abstract: An electrical fuse (e-fuse) includes a fuse link including a silicided semiconductor layer over a dielectric layer covering a gate conductor. The silicided semiconductor layer is non-planar and extends orthogonally over the gate conductor. A first terminal is electrically coupled to a first end of the fuse link, and a second terminal is electrically coupled to a second end of the fuse link. The fuse link may be formed in the same layer as an intrinsic and/or extrinsic base of a bipolar transistor. The gate conductor may control a current source for programming the e-fuse. The e-fuse reduces the footprint and the required programming energy compared to conventional e-fuses.

公开(公告)号：US11217685B2

公开(公告)日：2022-01-04

申请号：US16909376

申请日：2020-06-23

Applicant: GLOBALFOUNDRIES U.S. INC.

Inventor： Herbert Ho ,  Vibhor Jain ,  John J. Pekarik ,  Claude Ortolland ,  Judson R. Holt ,  Qizhi Liu ,  Viorel Ontalus

IPC: H01L29/737 ,  H01L29/66 ,  H01L29/08

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a device with a marker layer and methods of manufacture. The device includes: a collector region; an intrinsic base region above the collector region; an emitter region comprising emitter material and a marker layer vertically between the intrinsic base region and the emitter material; and an extrinsic base region in electrical contact with the intrinsic base region.

公开(公告)号：US11152520B1

公开(公告)日：2021-10-19

申请号：US16868773

申请日：2020-05-07

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Siva P. Adusumilli ,  Mark D. Levy ,  Vibhor Jain ,  John J. Ellis-Monaghan

IPC: H01L31/0232 ,  H01L27/144 ,  H01L31/18 ,  H01L31/105 ,  H01L31/028

Abstract: A photodetector includes a photodetecting region in a semiconductor substrate, and a reflector extending at least partially along a sidewall of the photodetecting region in the semiconductor substrate. The reflector includes an air gap defined in the semiconductor substrate. The reflector allows use of thinner germanium for the photodetecting region. The air gap may have a variety of internal features to direct electromagnetic radiation towards the photodetecting region.

公开(公告)号：US11145725B2

公开(公告)日：2021-10-12

申请号：US16823005

申请日：2020-03-18

Applicant: GLOBALFOUNDRIES U.S. INC.

Inventor： Qizhi Liu ,  Vibhor Jain ,  Judson R. Holt ,  Herbert Ho ,  Claude Ortolland ,  John J. Pekarik

IPC: H01L29/417 ,  H01L29/66 ,  H01L29/737 ,  H01L29/08

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a heterojunction bipolar transistor and methods of manufacture. The structure includes: a sub-collector region; a collector region in electrical connection to the sub-collector region; an emitter located adjacent to the collector region and comprising emitter material, recessed sidewalls on the emitter material and an extension region extending at an upper portion of the emitter material above the recessed sidewalls; and an extrinsic base separated from the emitter by the recessed sidewalls.

公开(公告)号：US11121097B1

公开(公告)日：2021-09-14

申请号：US16881736

申请日：2020-05-22

Applicant: GLOBALFOUNDRIES U.S. INC.

Inventor： Vibhor Jain ,  Sebastian T. Ventrone ,  Siva P. Adusumilli ,  John J. Ellis-Monaghan ,  Ajay Raman

IPC: H01L23/00 ,  H01L23/48

Abstract: The present disclosure relates to a metal layer for an active x-ray attack prevention device for securing integrated circuits. In particular, the present disclosure relates to a structure including a semiconductor material, one or more devices on a front side of the semiconductor material, a backside patterned metal layer under the one or more devices, located and structured to protect the one or more devices from an active intrusion, and at least one contact providing an electrical connection through the semiconductor material to a front side of the backside patterned metal layer. The backside patterned metal layer is between a wafer and one of the semiconductor material and an insulator layer.

公开(公告)号：US10983412B1

公开(公告)日：2021-04-20

申请号：US16674711

申请日：2019-11-05

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Vibhor Jain ,  Siva P. Adusumilli ,  John J. Ellis-Monaghan

IPC: G02F1/225 ,  G02F1/025 ,  G02F1/01 ,  G02B6/122 ,  H01L31/0232 ,  G02B6/12 ,  G02B6/136 ,  G02F1/21

Abstract: Structures including a photodetector and methods of fabricating such structures. A substrate, which is composed of a semiconductor material, includes a first trench, a second trench, and a pillar of the semiconductor material that is laterally positioned between the first trench and the second trench. A first portion of a dielectric layer is located in the first trench and a second portion of the dielectric layer is located in the second trench. A waveguide core is coupled to the pillar at a top surface of the substrate.

公开(公告)号：US12159910B2

公开(公告)日：2024-12-03

申请号：US17671879

申请日：2022-02-15

Applicant: GlobalFoundries U.S. Inc.

Inventor： Uppili Raghunathan ,  Vibhor Jain ,  Sebastian Ventrone ,  Johnatan Kantarovsky ,  Yves Ngu

IPC: H01L29/40 ,  H01L29/06 ,  H01L29/423 ,  H01L29/735

Abstract: Structures with an isolation region and fabrication methods for a structure having an isolation region. The structure includes a semiconductor substrate, a first isolation region surrounding a portion of the semiconductor substrate, a device in the portion of the semiconductor substrate, and a second isolation region surrounding the first isolation region and the portion of the semiconductor substrate.

公开(公告)号：US20240231173A1

公开(公告)日：2024-07-11

申请号：US18094716

申请日：2023-01-09

Applicant: GlobalFoundries U.S. Inc.

Inventor： Vibhor Jain ,  Yusheng Bian ,  Shesh Mani Pandey ,  Abdelsalam Aboketaf ,  Ravi Prakash Srivastava

IPC: G02F1/21 ,  F25B21/04 ,  G02F1/225 ,  H10N10/17 ,  H10N10/851 ,  H10N10/852

CPC classification number: G02F1/212 ,  F25B21/04 ,  G02F1/2257 ,  H10N10/17 ,  H10N10/852 ,  H10N10/8556 ,  G02F2202/10 ,  G02F2203/50

Abstract: Structures including an optical phase shifter and methods of forming a structure including an optical phase shifter. The structure comprises an optical phase shifter including a waveguide core having a first branch and a second branch laterally spaced from the first branch. The structure further comprises a thermoelectric device including a first plurality of pillars and a second plurality of pillars that alternate with the first plurality of pillars in a series circuit. The first plurality of pillars and the second plurality of pillars disposed adjacent to the first branch of the waveguide core, the first plurality of pillars comprises an n-type semiconductor material, and the second plurality of pillars comprises a p-type semiconductor material.

公开(公告)号：US20240192442A1

公开(公告)日：2024-06-13

申请号：US18079523

申请日：2022-12-12

Applicant: GlobalFoundries U.S. Inc.

Inventor： Ravi Prakash Srivastava ,  Yusheng Bian ,  Shesh Mani Pandey ,  Vibhor Jain

IPC: G02B6/122 ,  G02B6/136

CPC classification number: G02B6/1228 ,  G02B6/136

Abstract: Structures for an edge coupler and methods of forming a structure for an edge coupler. The structure comprises a substrate, a dielectric layer over the substrate, and a waveguide core over the substrate. The structure further comprises an airgap that extends at least partially through the dielectric layer and that surrounds a plurality of sides of a portion of the waveguide core.

公开(公告)号：US20240159701A1

公开(公告)日：2024-05-16

申请号：US17987543

申请日：2022-11-15

Applicant: GlobalFoundries U.S. Inc.

Inventor： Judson Holt ,  Bartlomiej Jan Pawlak ,  Vibhor Jain

IPC: G01N27/414

CPC classification number: G01N27/4148

Abstract: Structures for an ion-sensitive field-effect transistor and methods of forming same. The structure comprises a semiconductor substrate, a microfluidic channel above the semiconductor substrate, a semiconductor layer including a portion positioned as a sensing layer in the microfluidic channel, a first electrical connection coupled to the portion of the semiconductor layer, and a second electrical connection coupled to the semiconductor substrate. The portion of the semiconductor layer is spaced above the semiconductor substrate.