公开(公告)号：NO20044925A

公开(公告)日：2005-01-10

申请号：NO20044925

申请日：2004-11-11

Applicant: INTERDIGITAL TECH CORP

Inventor： KAEWELL JR JOHN DAVID ,  REZNIK ALEXANDER ,  HEPLER EDWARD L ,  MEYER JAN ,  BOHNHOFF PETER ,  BERGHIUS TIMOTHY ,  KOCH MICHAEL ,  HACKETT WILLIAM C ,  BASS DAVID S ,  FERRANTE STEVEN

IPC: H04B1/709 ,  H04B1/10 ,  H04B1/707 ,  H04B7/04 ,  H04B7/08 ,  H04B7/216 ,  H04B7/26 ,  H04L27/06 ,  H04Q7/30 ,  H04B1/69

CPC classification number: H04B1/7093 ,  H04B1/7075 ,  H04B1/7077 ,  H04B1/709 ,  H04B1/7113 ,  H04B1/7117 ,  H04B1/712 ,  H04B7/0491 ,  H04B2201/7071 ,  H04B2201/70711

公开(公告)号：NO20044923A

公开(公告)日：2005-01-05

申请号：NO20044923

申请日：2004-11-11

Applicant: INTERDIGITAL TECH CORP

Inventor： HEPLER EDWARD L ,  CASTOR DOUGLAS R ,  MCCLELLAN GEORGE W ,  STARSINIC MICHAEL F ,  LEVI ALAN M ,  BASS DAVID S ,  DESAI BINISH

IPC: H04J1/00 ,  H04B1/40 ,  H04B1/707 ,  H04B7/26 ,  H04J3/00 ,  H04J4/00 ,  H04L1/00 ,  H04L1/08 ,  H04L12/56 ,  H04W28/18 ,  H04W74/02 ,  H04W80/00 ,  H04W88/02 ,  G06F13/00

CPC classification number: H04W88/06 ,  H04B1/0067 ,  H04B1/406 ,  H04B1/707 ,  H04B7/2618 ,  H04B2201/70707 ,  H04L1/0061 ,  H04L1/0068 ,  H04L1/0071 ,  H04L1/08 ,  H04L2001/0094 ,  H04W28/18 ,  H04W74/02 ,  H04W80/00

公开(公告)号：CA2517912A1

公开(公告)日：2004-09-16

申请号：CA2517912

申请日：2004-03-05

Applicant: INTERDIGITAL TECH CORP

Inventor： FERRANTE STEVEN ,  HEPLER EDWARD L ,  BOHNHOFF PETER ,  MEYER JAN ,  HACKETT WILLIAM C ,  REZNIK ALEXANDER

IPC: G09G3/28 ,  H04B1/707 ,  H04B7/08 ,  H04B17/00 ,  H04J3/06 ,  H04L25/02 ,  H04B7/216

Abstract: A wireless transmit receive unit (WTRU) and methods are used in a wireless communication system to process sampled received signals to establish and/or maintain wireless communications (Fig 9 & 10). A selectively controllabl e coherent accumulation unit produces power delay profiles. A selectively controllable post processing unit passes threshold qualified magnitude approximation values and PDP positions to a device such as a rake receiver t o determine receive signal paths.

公开(公告)号：HK1060493A2

公开(公告)日：2004-07-09

申请号：HK03102741

申请日：2003-04-15

Applicant: INTERDIGITAL TECH CORP

Inventor： BASS DAVID S ,  CASTOR DOUGLAS R ,  MCCLELLAN GEORGE W ,  LEVI ALAN M ,  DESAI BINISH ,  HEPLER EDWARD L ,  STARSINIC MICHAEL F

IPC: H04J1/00 ,  H04B1/40 ,  H04B1/707 ,  H04B7/26 ,  H04J3/00 ,  H04J4/00 ,  H04L1/00 ,  H04L1/08 ,  H04L12/56 ,  H04W28/18 ,  H04W74/02 ,  H04W80/00 ,  H04W88/02 ,  H04B ,  H04Q

Abstract: A physical layer transport composite processing system used in a wireless communication system. A plurality of interconnected processing blocks are provided. The blocks are interconnected by a read data bus, a write data bus and a control bus. The blocks include a transport channel processing block (305,307), a composite channel processing block (303,309) and a chip rate processing block (301,311). At least two of the blocks are capable of processing data for a plurality of wireless formats. A first set of parameters is programmed into the blocks for a particular wireless mode. The blocks are operated to process data in the particular wireless format mode.

公开(公告)号：MXPA03009107A

公开(公告)日：2004-02-12

申请号：MXPA03009107

申请日：2002-04-05

Applicant: INTERDIGITAL TECH CORP

Inventor： HEPLER EDWARD L

IPC: G06F1/025 ,  H03M7/00 ,  H04J11/00 ,  H04J13/00 ,  H04J13/12 ,  H04L20060101 ,  H04L9/00 ,  H04L27/30

公开(公告)号：NO20034455A

公开(公告)日：2003-12-08

申请号：NO20034455

申请日：2003-10-03

Applicant: INTERDIGITAL TECH CORP

Inventor： HEPLER EDWARD L

IPC: G06F1/025 ,  H03M7/00 ,  H04J11/00 ,  H04J13/00 ,  H04J13/12 ,  H04L20060101 ,  H04L9/00 ,  H04L27/30

CPC classification number: G06F1/0255 ,  H04J13/0044 ,  H04J13/12

公开(公告)号：AU2003223595A1

公开(公告)日：2003-11-03

申请号：AU2003223595

申请日：2003-04-15

Applicant: INTERDIGITAL TECH CORP

Inventor： BASS DAVID S ,  CASTOR DOUGLAS R ,  MCCLELLAN GEORGE W ,  LEVI ALAN M ,  DESAI BINISH ,  HEPLER EDWARD L ,  STARSINIC MICHAEL F

IPC: H04J1/00 ,  H04B1/40 ,  H04B1/707 ,  H04B7/26 ,  H04J3/00 ,  H04J4/00 ,  H04L1/00 ,  H04L1/08 ,  H04L12/56 ,  H04W28/18 ,  H04W74/02 ,  H04W80/00 ,  H04W88/02

Abstract: A physical layer transport composite processing system used in a wireless communication system. A plurality of interconnected processing blocks are provided. The blocks are interconnected by a read data bus, a write data bus and a control bus. The blocks include a transport channel processing block (305,307), a composite channel processing block (303,309) and a chip rate processing block (301,311). At least two of the blocks are capable of processing data for a plurality of wireless formats. A first set of parameters is programmed into the blocks for a particular wireless mode. The blocks are operated to process data in the particular wireless format mode.

公开(公告)号：CA2482616A1

公开(公告)日：2003-10-30

申请号：CA2482616

申请日：2003-04-15

Applicant: INTERDIGITAL TECH CORP

Inventor： BASS DAVID S ,  CASTOR DOUGLAS R ,  MCCLELLAN GEORGE W ,  LEVI ALAN M ,  DESAI BINISH ,  HEPLER EDWARD L ,  STARSINIC MICHAEL F

IPC: H04J1/00 ,  H04B1/40 ,  H04B1/707 ,  H04B7/26 ,  H04J3/00 ,  H04J4/00 ,  H04L1/00 ,  H04L1/08 ,  H04L12/56 ,  H04W28/18 ,  H04W74/02 ,  H04W80/00 ,  H04W88/02

Abstract: A physical layer transport composite processing system used in a wireless communication system. A plurality of interconnected processing blocks are provided. The blocks are interconnected by a read data bus, a write data bus and a control bus. The blocks include a transport channel processing block (303, 307), a composite channel processing block (305, 309) and a chip rate processing block (301, 311). At least two of the blocks are capable of processing data for a plurality of wireless formats. A first set of paramete rs is programmed into the blocks for a particular wireless mode. The blocks are operated to process data in the particular wireless format mode.

公开(公告)号：AU2003239137A1

公开(公告)日：2003-10-27

申请号：AU2003239137

申请日：2003-04-11

Applicant: INTERDIGITAL TECH CORP

Inventor： BOHNHOFF PETER ,  REZNIK ALEXANDER ,  HEPLER EDWARD L ,  KOCH MICHAEL ,  HACKETT WILLIAM C ,  BASS DAVID S ,  FERRANTE STEVEN ,  KAEWELL JOHN DAVID JR ,  BERGHIUS TIMOTHY ,  MEYER JAN

IPC: H04B1/709 ,  H04B1/10 ,  H04B1/707 ,  H04B7/04 ,  H04B7/08 ,  H04B7/216 ,  H04B7/26 ,  H04L27/06 ,  H04Q7/30

公开(公告)号：NO20034455D0

公开(公告)日：2003-10-03

申请号：NO20034455

申请日：2003-10-03

Applicant: INTERDIGITAL TECH CORP

Inventor： HEPLER EDWARD L

IPC: G06F1/025 ,  H03M7/00 ,  H04J11/00 ,  H04J13/00 ,  H04J13/12 ,  H04L20060101 ,  H04L9/00 ,  H04L27/30 ,  H04L

Abstract: A pseudorandom code generator comprising a code generator configured to generate a series of 2 M M-bit wide binary codes starting from a lowest bit to a highest bit; an index code selector configured to select an M-bit wide binary index code corresponding to an index number of a pseudorandom code among a set of pseudorandom codes; a logical operator configured to perform a logical operation between each code generated by the code generator and the index code selected by the index code selector in order to generate a 2 M -bit wide pseudorandom code; and a code reverser configured to reverse an order of bits generated by the code generator from a least significant bit to a most significant bit.