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    83.
    发明专利
    未知

    公开(公告)号：DE69026828T2

    公开(公告)日：1996-10-02

    申请号：DE69026828

    申请日：1990-12-13

    Applicant: SGS THOMSON MICROELECTRONICS

    Inventor： PASCUCCI LUIGI

    IPC: G11C17/00 ,  G11C7/14 ,  G11C16/06 ,  G11C16/28 ,  G11C29/00 ,  G11C29/56 ,  G11C7/00

    Abstract: The sense circuit, for recognizing the virgin or programmed status of cells in storage devices, comprises a differential amplifier (DA) having a first input (Xo) connected to a number of selectable matrix cells (Tvm, Tpm) through a first uncoupling circuit (INVc, Tcu), a second input (Yo) connected to a number of selectable reference virgin cells (Tvr1, Tvr2) through a second uncoupling circuit (INVR, Tru), respective matrix and reference load transistors (TCL, TRL) connected between each input of the amplifier and a supply voltage, and a current generator (Ts, Tb, To) connected in parallel to the matrix cells and controlled by the first input of the amplifier to draw a current equal to a predetermined fraction of the current flowing through said first input.

    84.
    发明专利
    未知

    公开(公告)号：IT1246238B

    公开(公告)日：1994-11-17

    申请号：IT8360490

    申请日：1990-02-16

    Applicant: SGS THOMSON MICROELECTRONICS

    Inventor： PASCUCCI LUIGI ,  OLIVO MARCO

    IPC: H03K3/354 ,  H02M3/07 ,  H03B

    Abstract: A voltage-boosted phase oscillator for driving a voltage multiplier comprises two intermeshed ring oscillators, each composed by an odd number of inverters connected in cascade through a closed loop and generating a normal phase and a voltage-boosted phase derived from the normal phase through a bootstrap circuit. The frequency of oscillation of both intermeshed ring oscillators is established by means of two similar RC networks common to both loops. The synchronization of the respective oscillations of the two rings is ensured by means of a plurality of SR flip-flops connected in cascade, formed by two NAND gates which, singularly, constitute as many inverters of the two rings. The oscillation and the arresting of the oscillation are controlled by means of a logic signal fed to a common input of a first pair of NAND gates which constitute respectively a first inverter of the relative ring oscillator and to a second input of which the phase produced by the relative ring oscillator is fed.

    87.
    发明专利
    未知

    公开(公告)号：ITVA910012D0

    公开(公告)日：1991-05-10

    申请号：ITVA910012

    申请日：1991-05-10

    Applicant: SGS THOMSON MICROELECTRONICS

    Inventor： PASCUCCI LUIGI

    IPC: G11C11/409 ,  G11C7/06 ,  G11C16/06 ,  G11C16/28 ,  G11C16/30 ,  G11C17/00 ,  G11C17/18

    Abstract: A modulated-current offset-type or currentunbalance, offset-type sense amplifier for reading programmable memory cells employs loads identical to each other and a differential input pair of transistors of the differential amplifier are "cross-coupled" with said identical loads to realize a latch structure for storing an extracted data. The circuit utilizes three timing signals for sequentially modifying the configuration of the circuit and defining the following phases: start of a new reading cycle, pre-charging of capacitances associated with bit lines, and equalization of output nodes and line potentials, discrimination phase, reading and storing of the extracted data. Different embodiments employing different reference systems are described.

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