Abstract:
A system for analyzing the operation of a switching power converter includes a digital controller for receiving an analog signal representing the output DC voltage of the power converter for comparison to a desired output voltage level and generating switching control signals to control the operation of the power supply to regulate the output DC voltage to said output voltage level. At least one portion of a control loop within the digital controller may he switched into the control loop in a first mode of operation and out of the control loop in a second mode of operation. A microcontroller emulates the operation of the at least one portion of the control loop during the second mode of operation.
Abstract:
A system for analyzing the operation of a switching power converter includes a digital controller for receiving an analog signal representing the output DC voltage of the power converter for comparison to a desired output voltage level and generating switching control signals to control the operation of the power supply to regulate the output DC voltage to said output voltage level. At least one portion of a control loop within the digital controller may he switched into the control loop in a first mode of operation and out of the control loop in a second mode of operation. A microcontroller emulates the operation of the at least one portion of the control loop during the second mode of operation.
Abstract:
A digital device having selectable modes for USB communications buffer management in a USB interface of the digital device. These modes may comprise (1) no ping-pong buffer support, (2) ping-pong buffer support for some endpoints, e.g., support for OUT endpoint 0 only, and (3) ping-pong buffer support for all endpoints. In the no ping-pong buffer support mode, no hardware is required for automatic ping-pong buffer management. In the ping-pong buffer support for OUT endpoint 0 only mode, endpoint 0 setup transfers may be serviced without delay while only requiring a minimal number of memory locations for the remainder of the buffer descriptors. In the ping-pong buffer support for all endpoints mode, automatic ping-pong buffer management may be provided for all endpoints. This mode assures that all endpoint transfers may be serviced substantially without delay.
Abstract:
A digital device having selectable modes for USB communications buffer management in a USB interface of the digital device. These modes may comprise (1) no ping-pong buffer support, (2) ping-pong buffer support for some endpoints, e.g., support for OUT endpoint 0 only, and (3) ping-pong buffer support for all endpoints. In the no pingpong buffer support mode, no hardware is required for automatic ping-pong buffer management. The Buffer Descriptor Tables may comprise a maximum of 128 memory locations, e.g., 16 IN endpoints and 16 OUT endpoints, each with at least one buffer descriptor, and each comprising four (4) memory locations. In the ping-pong buffer support for OUT endpoint 0 only mode, the buffer descriptor Tables may comprise a maximum of 132 memory locations, e.g., 16 OUT endpoints with an EVEN and an ODD endpoint 0, 16 IN endpoints, each with at least one descriptor, e.g., memory locations. This mode assures that endpoint 0 setup transfers may be serviced without delay while only requiring a minimal number of memory locations for the remainder of the buffer descriptors. In the ping-pong buffer support for all endpoints mode, automatic ping-pong buffer management may be provided for all endpoints. The Buffer Descriptor Tables may comprise a maximum of 256 memory locations, e.g., 16 IN endpoints and 16 OUT endpoints, an EVEN and ODD set for each, each with one descriptor, e.g., four (4) memory locations. This mode assures that all endpoint transfers may be serviced substantially without delay.